| Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference F Conti, L Cavigelli, G Paulin, I Susmelj, L Benini 2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018 | 51 | 2018 |
| 22.1 A 12.4 TOPS/W@ 136GOPS AI-IoT system-on-chip with 16 RISC-V, 2-to-8b precision-scalable DNN acceleration and 30%-boost adaptive body biasing F Conti, D Rossi, G Paulin, A Garofalo, A Di Mauro, G Rutishauer, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 21-23, 2023 | 16 | 2023 |
| MiniFloat-NN and ExSdotp: An ISA extension and a modular open hardware unit for low-precision training on RISC-V cores L Bertaccini, G Paulin, T Fischer, S Mach, L Benini 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH), 1-8, 2022 | 11 | 2022 |
| RNN-based radio resource management on multicore RISC-V accelerator architectures G Paulin, R Andri, F Conti, L Benini IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (9 …, 2021 | 9 | 2021 |
| Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2–8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing F Conti, G Paulin, A Garofalo, D Rossi, A Di Mauro, G Rutishauser, ... IEEE Journal of Solid-State Circuits, 2023 | 8 | 2023 |
| Vau da muntanialas: Energy-efficient multi-die scalable acceleration of RNN inference G Paulin, F Conti, L Cavigelli, L Benini IEEE Transactions on Circuits and Systems I: Regular Papers 69 (1), 244-257, 2021 | 5 | 2021 |
| Ita: An energy-efficient attention and softmax accelerator for quantized transformers G Islamoglu, M Scherer, G Paulin, T Fischer, VJB Jung, A Garofalo, ... 2023 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2023 | 4 | 2023 |
| CONVOLVE: Smart and seamless design of smart edge processors M Gomony, F Putter, A Gebregiorgis, G Paulin, L Mei, V Jain, S Hamdioui, ... arXiv preprint arXiv:2212.00873, 2022 | 3 | 2022 |
| MiniFloats on RISC-V Cores: ISA Extensions with Mixed-Precision Short Dot Products L Bertaccini, G Paulin, M Cavalcante, T Fischer, S Mach, L Benini IEEE Transactions on Emerging Topics in Computing, 2024 | 2 | 2024 |
| Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters G Paulin, M Cavalcante, P Scheffler, L Bertaccini, Y Zhang, F Gürkaynak, ... 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 44-49, 2022 | 2 | 2022 |
| Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit … G Paulin, P Scheffler, T Benz, M Cavalcante, T Fischer, M Eggimann, ... arXiv preprint arXiv:2406.15068, 2024 | 1 | 2024 |
| Multi-System GNSS Receiver Software G Paulin Technical report, Distributed Computing Group Computer Engineering and …, 2017 | 1 | 2017 |
| Hardware Architectures for Energy-Efficient Neural Network Acceleration G Paulin ETH Zurich, 2023 | | 2023 |
| PetaOps/W edge-AI Processors: Myth or reality? MD Gomony, F De Putter, A Gebregiorgis, G Paulin, L Mei, V Jain, ... 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | | 2023 |
Luca BeniniETH Zürich, Università di Bologna在 unibo.it 的电子邮件经过验证
