Automated processor generation system for designing a configurable processor and method for the same EA Killian, RE Gonzalez, AB Dixit, M Lam, WD Lichtenstein, C Rowen, ... US Patent 6,477,683, 2002 | 326 | 2002 |
Alignment and ordering of vector elements for single instruction multiple data processing TJ Van Hook, P Hsu, WA Huffman, HP Moreton, EA Killian US Patent 5,933,650, 1999 | 237 | 1999 |
Automated processor generation system for designing a configurable processor and method for the same EA Killian, RE Gonzalez, AB Dixit, M Lam, WD Lichtenstein, C Rowen, ... US Patent 7,020,854, 2006 | 175 | 2006 |
Automated processor generation system for designing a configurable processor and method for the same EA Killian, RE Gonzalez, AB Dixit, M Lam, WD Lichtenstein, C Rowen, ... US Patent 6,760,888, 2004 | 153 | 2004 |
Method for providing extended precision in SIMD vector arithmetic operations T Van Hook, P Hsu, WA Huffman, HP Moreton, EA Killian US Patent 5,864,703, 1999 | 139 | 1999 |
Hardware/software instruction set configurability for system-on-chip processors A Wang, E Killian, D Maydan, C Rowen Proceedings of the 38th annual Design Automation Conference, 184-188, 2001 | 125 | 2001 |
Alignment and ordering of vector elements for single instruction multiple data processing TJ Van Hook, P Hsu, WA Huffman, HP Moreton, EA Killian US Patent 6,266,758, 2001 | 116 | 2001 |
Engineering a RISC Compiler System. FC Chow, MI Himelstein, E Killian, L Weber COMPCON, 132-137, 1986 | 92 | 1986 |
Automated processor generation system for designing a configurable processor and method for the same EA Killian, RE Gonzalez, AB Dixit, M Lam, WD Lichtenstein, C Rowen, ... US Patent 8,006,204, 2011 | 85 | 2011 |
Load/store operation of memory misaligned vector data using alignment register storing realigned data portion for combining with remaining portion HA Sanghavi, EA Killian, JR Kennedy, DS Petkov, P Tu, WA Huffman US Patent 7,219,212, 2007 | 84 | 2007 |
Automated processor generation system for designing a configurable processor and method for the same ARR Wang, R Ruddell, DW Goodwin, EA Killian, N Bhattacharyya, ... US Patent 7,036,106, 2006 | 78 | 2006 |
Providing extended precision in SIMD vector arithmetic operations TJ Van Hook, P Hsu, WA Huffman, HP Moreton, EA Killian US Patent 8,074,058, 2011 | 67 | 2011 |
High data density RISC processor EA Killian, RE Gonzalez, AB Dixit, M Lam, WD Lichtenstein, C Rowen, ... US Patent 6,282,633, 2001 | 67 | 2001 |
Adding complex instruction extensions defined in a standardized language to a microprocessor design to produce a configurable definition of a target instruction set, and hdl … EA Killian, R Ruddell, ARR Wang US Patent 6,477,697, 2002 | 65 | 2002 |
System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different … LB Weber, EA Killian, MI Himelstein US Patent 5,398,328, 1995 | 62 | 1995 |
Configurable memory management unit MA Evans, EA Killian, P Konas US Patent 6,854,046, 2005 | 57 | 2005 |
Fast parallel CRC algorithm and implementation on a configurable processor HM Ji, E Killian 2002 IEEE International Conference on Communications. Conference Proceedings …, 2002 | 53 | 2002 |
Processor controlled interface with instruction streaming TJ Riordan, PS Ries, EL Hudson, EA Killian US Patent 5,027,270, 1991 | 53 | 1991 |
System and method of designing instruction extensions to supplement an existing processor instruction set architecture EA Killian, RE Gonzalez, AB Dixit, M Lam, WD Lichtenstein, C Rowen, ... US Patent 8,924,898, 2014 | 52 | 2014 |
Backward-compatible computer architecture with extended word size and address space EA Killian, TJ Riordan, DL Freitas, AB Dixit, JL Hennessy US Patent 5,420,992, 1995 | 52 | 1995 |