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Stefano Di Mascio
Stefano Di Mascio
Leonardo S.p.A.
在 leonardo.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
Leveraging the Openness and Modularity of RISC-V in Space
S Di Mascio, A Menicucci, E Gill, G Furano, C Monteleone
Journal of Aerospace Information Systems 16 (11), 454-472, 2019
342019
The case for RISC-V in space
S Di Mascio, A Menicucci, G Furano, C Monteleone, M Ottavi
International Conference on Applications in Electronics Pervading Industry …, 2018
322018
Towards defining a simplified procedure for COTS system-on-chip TID testing
S Di Mascio, A Menicucci, G Furano, T Szewczyk, L Campajola, ...
Nuclear Engineering and Technology 50 (8), 1298-1305, 2018
142018
Open-source IP cores for space: A processor-level perspective on soft errors in the RISC-V era
S Di Mascio, A Menicucci, E Gill, G Furano, C Monteleone
Computer Science Review 39, 100349, 2021
132021
Simplified Procedures for COTS TID Testing: A Comparison Between 90Sr and 60Co
A Menicucci, F Malatesta, F Di Capua, L Campajola, P Casolaro, ...
2018 IEEE Radiation Effects Data Workshop (REDW), 1-6, 2018
112018
A novel method for SEE validation of complex SoCs using Low-Energy Proton beams
G Furano, S Di Mascio, T Szewczyk, A Menicucci, L Campajola, ...
2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2016
112016
A european roadmap to leverage RISC-V in space applications
G Furano, S Di Mascio, A Menicucci, C Monteleone
2022 IEEE Aerospace Conference (AERO), 1-7, 2022
102022
On-board decision making in space with deep neural networks and risc-v vector processors
S Di Mascio, A Menicucci, E Gill, G Furano, C Monteleone
Journal of Aerospace Information Systems 18 (8), 553-570, 2021
92021
On-Board Satellite Telemetry Forecasting with RNN on RISC-V Based Multicore Processor
D Cappellone, S Di Mascio, G Furano, A Menicucci, M Ottavi
2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2020
92020
Is risc-v ready for space? a security perspective
L Cassano, S Di Mascio, A Palumbo, A Menicucci, G Furano, G Bianchi, ...
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2022
82022
On the criticality of caches in fault-tolerant processors for space
S Di Mascio, A Menicucci, E Gill, G Furano, C Monteleone
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019
82019
Full Characterization of a Compact 90Sr/90Y beta source for TID radiation testing
F Di Capua, L Campajola, P Casolaro, M Campajola, A Aloisio, ...
Advances in Space Research 63 (10), 3249-3257, 2019
72019
Qualitative techniques for System-on-Chip test with low-energy protons
S Di Mascio, M Ottavi, G Furano, T Szewczyk, A Menicucci, L Campajola, ...
2016 International Conference on Design and Technology of Integrated Systems …, 2016
32016
Preventing Soft Errors and Hardware Trojans in RISC-V Cores
EB Annink, G Rauwerda, E Hakkennes, A Menicucci, S Di Mascio, ...
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2022
22022
Extending the noel-v platform with a risc-v vector processor for space applications
S Di Mascio, A Menicucci, E Gill, C Monteleone
Journal of Aerospace Information Systems 20 (9), 565-574, 2023
12023
Spin-in of RISC-V Processors in Space Embedded Systems
S Di Mascio
12022
Command and data handling systems
S Speretta, J Bouwmeester, A Menicucci, S Di Mascio, MŞ Uludağ
Next Generation CubeSats and SmallSats, 369-399, 2023
2023
Computer Science Review
S Di Mascio, A Menicucci, E Gill, G Furano, C Monteleone
2020
35rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
E Annink, G Rauwerda, E Hakkennes, A Menicucci, S Di Mascio, ...
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