| Ultrathin high-K gate stacks for advanced CMOS devices EP Gusev, DA Buchanan, E Cartier, A Kumar, D DiMaria, S Guha, ... International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001 | 390 | 2001 |
| Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs) AW Topol, DC La Tulipe, L Shi, SM Alam, DJ Frank, SE Steen, J Vichiconti, ... IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005 | 358 | 2005 |
| Microstructure and thermal stability of HfO2 gate dielectric deposited on Ge (100) EP Gusev, H Shang, M Copel, M Gribelyuk, C D’emic, P Kozlowski, ... Applied physics letters 85 (12), 2334-2336, 2004 | 149 | 2004 |
| SiGe-on-insulator prepared by wafer bonding and layer transfer for high-performance field-effect transistors LJ Huang, JO Chu, DF Canaperi, CP D’emic, RM Anderson, SJ Koester, ... Applied Physics Letters 78 (9), 1267-1269, 2001 | 145 | 2001 |
| Universal tunneling behavior in technologically relevant P/N junction diodes PM Solomon, J Jopling, DJ Frank, C D’Emic, O Dokumaci, P Ronsheim, ... Journal of applied physics 95 (10), 5800-5812, 2004 | 121 | 2004 |
| Carrier mobility enhancement in strained Si-on-insulator fabricated by wafer bonding LJ Huang, JO Chu, S Goma, CP D'Emic, SJ Koester, DF Canaperi, ... 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2001 | 105 | 2001 |
| Bias-temperature instabilities and radiation effects in MOS devices XJ Zhou, DM Fleetwood, JA Felix, EP Gusev, C D'Emic IEEE Transactions on Nuclear Science 52 (6), 2231-2238, 2005 | 99 | 2005 |
| Radiation-induced charge trapping in thin Al/sub 2/O/sub 3//SiO/sub x/N/sub y//Si (100) gate dielectric stacks JA Felix, MR Shaneyfelt, DM Fleetwood, TL Meisenheimer, JR Schwank, ... IEEE Transactions on Nuclear Science 50 (6), 1910-1918, 2003 | 87 | 2003 |
| Device design considerations for ultra-thin SOI MOSFETs B Doris, M Ieong, T Zhu, Y Zhang, M Steen, W Natzle, S Callegari, ... IEEE International Electron Devices Meeting 2003, 27.3. 1-27.3. 4, 2003 | 72 | 2003 |
| Electron and hole mobility enhancement in strained SOI by wafer bonding L Huang, JO Chu, SA Goma, CP d'Emic, SJ Koester, DF Canaperi, ... IEEE Transactions on Electron Devices 49 (9), 1566-1571, 2002 | 71 | 2002 |
| Thermally robust dual-work function ALD-MN/sub x/MOSFETs using conventional CMOS process flow DG Park, ZJ Luo, N Edleman, W Zhu, P Nguyen, K Wong, C Cabral, ... Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 186-187, 2004 | 63 | 2004 |
| Negative bias-temperature instabilities in metal–oxide–silicon devices with SiO2 and SiOxNy/HfO2 gate dielectrics XJ Zhou, L Tsetseris, SN Rashkeev, DM Fleetwood, RD Schrimpf, ... Applied physics letters 84 (22), 4394-4396, 2004 | 62 | 2004 |
| Systematic study of pFET V/sub t/with Hf-based gate stacks with poly-Si and FUSI gates E Cartier, V Narayanan, EP Gusev, P Jamison, B Linder, M Steen, ... Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 44-45, 2004 | 48 | 2004 |
| Complementary thin-base symmetric lateral bipolar transistors on SOI J Cai, TH Ning, C D'Emic, KK Chan, WE Haensch, JB Yau, DG Park 2011 International Electron Devices Meeting, 16.3. 1-16.3. 4, 2011 | 47 | 2011 |
| Asymmetric energy distribution of interface traps in n-and p-MOSFETs with HfO/sub 2/gate dielectricon ultrathin SiON buffer layer JP Han, EM Vogel, EP Gusev, C D'Emic, CA Richter, DW Heh, JS Suehle IEEE Electron Device Letters 25 (3), 126-128, 2004 | 46 | 2004 |
| Understanding short-term BTI behavior through comprehensive observation of gate-voltage dependence of RTN in highly scaled high-κ/metal-gate pFETs H Miki, M Yamaoka, N Tega, Z Ren, M Kobayashi, CP D'Emic, Y Zhu, ... 2011 Symposium on VLSI Technology-Digest of Technical Papers, 148-149, 2011 | 42 | 2011 |
| IEDM Tech. Dig. EP Gusev, DA Buchanan, E Cartier, A Kumar, D DiMaria, S Guha, ... P451, 2001 | 40 | 2001 |
| Reduction of random telegraph noise in high-к/metal-gate stacks for 22 nm generation FETs N Tega, H Miki, Z Ren, CP D'Emic, Y Zhu, DJ Frank, J Cai, MA Guillorn, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 39 | 2009 |
| Charge trapping and annealing in high-/spl kappa/gate dielectrics JA Felix, MR Shaneyfelt, DM Fleetwood, JR Schwank, PE Dodd, ... IEEE transactions on nuclear science 51 (6), 3143-3149, 2004 | 32 | 2004 |
| Ultrathin high-K gate stacks for advanced CMOS devices,“IEDM Tech EP Gusev, DA Buchanan, E Cartier, A Kumar, D DiMaria, S Guha, ... Dig. 451, 2001 | 31 | 2001 |
Evgeni GusevQualcomm在 qti.qualcomm.com 的电子邮件经过验证
