| AKER: A design and verification framework for safe and secure soc access control F Restuccia, A Meza, R Kastner 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 25 | 2021 |
| Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark H Borras, G Di Guglielmo, J Duarte, N Ghielmetti, B Hawks, S Hauck, ... arXiv preprint arXiv:2206.11791, 2022 | 16 | 2022 |
| Isadora: Automated information flow property generation for hardware designs C Deutschbein, A Meza, F Restuccia, R Kastner, C Sturton Proceedings of the 5th Workshop on Attacks and Solutions in Hardware …, 2021 | 14 | 2021 |
| Security verification of the opentitan hardware root of trust A Meza, F Restuccia, J Oberg, D Rizzo, R Kastner IEEE Security & Privacy 21 (3), 27-36, 2023 | 12 | 2023 |
| Toward hardware security property generation at scale C Deutschbein, A Meza, F Restuccia, M Gregoire, R Kastner, C Sturton IEEE Security & Privacy 20 (3), 43-51, 2022 | 7 | 2022 |
| A framework for design, verification, and management of SoC access control systems F Restuccia, A Meza, R Kastner, J Oberg IEEE Transactions on Computers 72 (2), 386-400, 2022 | 6 | 2022 |
| Automating hardware security property generation R Kastner, F Restuccia, A Meza, S Ray, J Fung, C Sturton Proceedings of the 59th ACM/IEEE Design Automation Conference, 1384-1387, 2022 | 5 | 2022 |
| Tailor: Altering Skip Connections for Resource-Efficient Inference O Weng, G Marcano, V Loncar, A Khodamoradi, N Sheybani, A Meza, ... ACM Transactions on Reconfigurable Technology and Systems 17 (1), 1-23, 2024 | 4 | 2024 |
| Chimpact: A longitudinal dataset for understanding chimpanzee behaviors X Ma, S Kaufhold, J Su, W Zhu, J Terwilliger, A Meza, Y Zhu, F Rossano, ... Advances in Neural Information Processing Systems 36, 27501-27531, 2023 | 4 | 2023 |
| Isadora: automated information-flow property generation for hardware security verification C Deutschbein, A Meza, F Restuccia, R Kastner, C Sturton Journal of Cryptographic Engineering 13 (4), 391-407, 2023 | 4 | 2023 |
| Safety verification of third-party hardware modules via information flow tracking A Meza, F Restuccia, R Kastner, J Oberg Proc. 1st Real-Time Intell. Edge Comput. Workshop (RAGE) Co-Located 59th …, 2022 | 4 | 2022 |
| Pentimento: Data remanence in cloud FPGAs C Drewes, O Weng, A Meza, A Althoff, D Kohlbrenner, R Kastner, ... Proceedings of the 29th ACM International Conference on Architectural …, 2024 | 1 | 2024 |
| Fkeras: A sensitivity analysis tool for edge neural networks O Weng, A Meza, Q Bock, B Hawks, J Campos, N Tran, JM Duarte, ... Journal on Autonomous Transportation Systems, 2024 | 1 | 2024 |
| Special Session: CAD for Hardware Security-Promising Directions for Automation of Security Assurance S Aftabjahani, M Tehranipoor, F Farahmandi, B Ahmed, R Kastner, ... 2023 IEEE 41st VLSI Test Symposium (VTS), 1-10, 2023 | 1 | 2023 |
| Information Flow Coverage Metrics for Hardware Security Verification A Meza, R Kastner arXiv preprint arXiv:2304.08263, 2023 | 1 | 2023 |
| Reliable edge machine learning hardware for scientific applications T Baldi, J Campos, B Hawks, J Ngadiuba, N Tran, D Diaz, J Duarte, ... 2024 IEEE 42nd VLSI Test Symposium (VTS), 1-5, 2024 | | 2024 |
| FKeras: A Fault Tolerance Library for Keras O Weng, A Meza, JM Duarte, N Tran, R Kastner Flat Optics: Components to Systems, JTu4A. 40, 2023 | | 2023 |
| Automated Generation, Verification, and Ranking of Secure SoC Access Control Policies A Meza, R Kastner Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 198-202, 2023 | | 2023 |
| submitter: Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark H Borras, R Kastner, T Nguyen, M Blott, N Tran, R Roy, Y Umuroglu, ... | | 2022 |
| Also in This Issue C Deutschbein, A Meza, F Restuccia, M Gregoire, R Kastner, C Sturton, ... | | 2022 |
