Design and Analysis of Multiplier Using Approximate 4-2 Compressor KM Reddy, MH Vasantha, YBN Kumar, D Dwivedi AEU-International Journal of Electronics and Communications 107, 89-97, 2019 | 88 | 2019 |
Approximate radix-8 booth multiplier for low power and high speed applications B Boro, KM Reddy, YBN Kumar, MH Vasantha Microelectronics Journal 101, 104816, 2020 | 30 | 2020 |
Design of approximate booth squarer for error-tolerant computing KM Reddy, MH Vasantha, YBN Kumar, D Dwivedi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (5 …, 2020 | 30 | 2020 |
Design of approximate dividers for error tolerant applications KM Reddy, MH Vasantha, YBN Kumar, D Dwivedi 2018 IEEE 61st International Midwest Symposium on Circuits and Systems …, 2018 | 22 | 2018 |
Low power, high speed error tolerant multiplier using approximate adders KM Reddy, YBN Kumar, D Sharma, MH Vasantha 2015 19th International Symposium on VLSI Design and Test, 1-6, 2015 | 17 | 2015 |
Training of Generative Adversarial Networks with Hybrid Evolutionary Optimization Technique CG Korde, KM Reddy 2019 IEEE 16th India Council International Conference (INDICON), 1-4, 2019 | 12 | 2019 |
Quantization aware approximate multiplier and hardware accelerator for edge computing of deep learning applications KM Reddy, MH Vasantha, YBN Kumar, CK Gopal, D Dwivedi Integration 81, 268-279, 2021 | 11 | 2021 |
Low Power Approximate Multipliers With Truncated Carry Propagation for LSBs P Yadav, A Pandey, KM Reddy, KJR Prasad, MH Vasantha, YBN Kumar 2018 IEEE 61st International Midwest Symposium on Circuits and Systems …, 2018 | 9 | 2018 |
Design and Analysis of Approximate Multipliers for Error-Tolerant Applications A Pandey, KM Reddy, P Yadav, MH Vasantha 2018 IEEE International Symposium on Smart Electronic Systems (iSES …, 2018 | 5 | 2018 |
Design and Analysis of Approximate Arithmetic Circuits KM Reddy Ponda, 0 | | |