| A compact FPGA-based architecture for elliptic curve cryptography over prime fields J Vliegen, N Mentens, J Genoe, A Braeken, S Kubera, A Touhafi, ... ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010 | 78 | 2010 |
| HEPCloud: An FPGA-based multicore processor for FV somewhat homomorphic function evaluation SS Roy, K Järvinen, J Vliegen, F Vercauteren, I Verbauwhede IEEE Transactions on Computers 67 (11), 1637-1650, 2018 | 63 | 2018 |
| Hardware assisted fully homomorphic function evaluation and encrypted search SS Roy, F Vercauteren, J Vliegen, I Verbauwhede IEEE Transactions on Computers 66 (9), 1562-1572, 2017 | 37 | 2017 |
| Trusted configuration in cloud FPGAs S Zeitouni, J Vliegen, T Frassetto, D Koch, AR Sadeghi, N Mentens 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom …, 2021 | 29 | 2021 |
| SHeLA: Scalable heterogeneous layered attestation MM Rabbani, J Vliegen, J Winderickx, M Conti, N Mentens IEEE Internet of Things Journal 6 (6), 10240-10250, 2019 | 29 | 2019 |
| Secure remote reconfiguration of an FPGA-based embedded system A Braeken, J Genoe, S Kubera, N Mentens, A Touhafi, I Verbauwhede, ... 6th International Workshop on Reconfigurable Communication-Centric Systems …, 2011 | 27 | 2011 |
| A single-chip solution for the secure remote configuration of FPGAs using bitstream compression J Vliegen, N Mentcns, I Verbauwhede 2013 International Conference on Reconfigurable Computing and FPGAs …, 2013 | 25 | 2013 |
| Side-channel evaluation of FPGA implementations of binary Edwards curves L Batina, J Hogenboom, N Mentens, J Moelans, J Vliegen 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 25 | 2010 |
| SACHa: Self-attestation of configurable hardware J Vliegen, MM Rabbani, M Conti, N Mentens 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 746-751, 2019 | 23 | 2019 |
| Secure, remote, dynamic reconfiguration of FPGAs J Vliegen, N Mentens, I Verbauwhede ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (4), 1-19, 2014 | 23 | 2014 |
| Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA J Vliegen, O Reparaz, N Mentens 2017 IEEE 2nd International Verification and Security Workshop (IVSW), 140-145, 2017 | 21 | 2017 |
| Completing the complete ECC formulae with countermeasures Ł Chmielewski, PMC Massolino, J Vliegen, L Batina, N Mentens Journal of Low Power Electronics and Applications 7 (1), 3, 2017 | 17 | 2017 |
| DynamIA: Dynamic hardware reconfiguration in industrial applications N Mentens, J Vandorpe, J Vliegen, A Braeken, B da Silva, A Touhafi, ... Applied Reconfigurable Computing: 11th International Symposium, ARC 2015 …, 2015 | 15 | 2015 |
| Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications A Sateesan, J Vliegen, J Daemen, N Mentens 2020 23rd Euromicro Conference on Digital System Design (DSD), 262-269, 2020 | 14 | 2020 |
| Speed records in network flow measurement on FPGA A Sateesan, J Vliegen, S Scherrer, HC Hsiao, A Perrig, N Mentens 2021 31st International Conference on Field-Programmable Logic and …, 2021 | 13 | 2021 |
| Low-rate overuse flow tracer (loft): An efficient and scalable algorithm for detecting overuse flows S Scherrer, CY Wu, YH Chiang, B Rothenberger, DE Asoni, A Sateesan, ... 2021 40th International Symposium on Reliable Distributed Systems (SRDS …, 2021 | 11 | 2021 |
| The monte carlo puf V Rožić, B Yang, J Vliegen, N Mentens, I Verbauwhede 2017 27th International Conference on Field Programmable Logic and …, 2017 | 10 | 2017 |
| Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs J Vliegen, N Mentens, D Koch, D Schellekens, I Verbauwhede Journal of Cryptographic Engineering 5 (2), 113-122, 2015 | 10 | 2015 |
| Secure FPGA technologies and techniques A Braeken, S Kubera, F Trouillez, A Touhafi, N Mentens, J Vliegen 2009 International Conference on Field Programmable Logic and Applications …, 2009 | 10 | 2009 |
| Design of a fully balanced ASIC coprocessor implementing complete addition formulas on Weierstrass elliptic curves N Pirotte, J Vliegen, L Batina, N Mentens 2018 21st Euromicro Conference on Digital System Design (DSD), 545-552, 2018 | 9 | 2018 |
Nele MentensLeiden University and KU Leuven在 esat.kuleuven.be 的电子邮件经过验证
