Distributed arithmetic architectures for fir filters-a comparative review G NagaJyothi, S SriDevi 2017 International conference on wireless communications, signal processing …, 2017 | 54 | 2017 |
A microwatt low voltage bandgap reference for bio-medical applications R Nagulapalli, K Hayatleh, S Barker, S Zourob, N Yassine, S Sridevi 2017 International Conference on Recent Advances in Electronics and …, 2017 | 38 | 2017 |
High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter G NagaJyothi, S Sridevi Multimedia Tools and Applications 78, 32679-32693, 2019 | 32 | 2019 |
A bio-medical compatible self bias opamp in 45nm CMOS technology R Nagulapalli, K Hayatleh, S Barker, S Zourob, N Yassine, S Sridevi 2017 International conference on Microelectronic Devices, Circuits and …, 2017 | 27 | 2017 |
Asic implementation of low power, area efficient adaptive fir filter using pipelined da G Naga Jyothi, S Sriadibhatla Microelectronics, Electromagnetics and Telecommunications: Proceedings of …, 2019 | 21 | 2019 |
High speed low area OBC DA based decimation filter for hearing aids application G NagaJyothi, S Sridevi International Journal of Speech Technology 23, 111-121, 2020 | 19 | 2020 |
Asic implementation of shared lut based distributed arithmetic in fir filter NJ Grande, S Sridevi 2017 International conference on microelectronic devices, Circuits and …, 2017 | 17 | 2017 |
A PVT insensitive programmable amplifier for biomedical applications R Nagulapalli, K Hayatleh, S Barker, S Zourob, N Yassine, S Sridevi 2017 International conference on Microelectronic Devices, Circuits and …, 2017 | 17 | 2017 |
Low power, low area adaptive finite impulse response filter based on memory less distributed arithmetic GN Jyothi, S Sridevi Journal of Computational and Theoretical Nanoscience 15 (6-7), 2003-2008, 2018 | 14 | 2018 |
High speed finfet traff comparator based function generator D Kundu, S Guin, G NagaJyothi, S Sridevi 2018 International Conference on Computation of Power, Energy, Information …, 2018 | 11 | 2018 |
Design and analysis of a dual gate tunnel FET with InGaAs source pockets for improved performance G Rasheed, S Sridevi Microelectronics Journal 129, 105587, 2022 | 10 | 2022 |
Hybrid self-controlled precharge-free CAM design for low power and high performance VVS SATTI, S Sriadibhatla Turkish Journal of Electrical Engineering and Computer Sciences 27 (2), 1132 …, 2019 | 9 | 2019 |
Efficient CAM cell design for low power and low delay VVS Satti, S Sriadibhatla 2017 International conference on Microelectronic Devices, Circuits and …, 2017 | 9 | 2017 |
Tunnel FET based SRAM cells–a comparative review R Gadarapulla, S Sriadibhatla Microelectronic Devices, Circuits and Systems: Second International …, 2021 | 8 | 2021 |
InGaAs-Si double pocket-dual gate tunnel FET based 7T SRAM design KS Kujur, G Rasheed, S Sridevi Silicon 14 (15), 10087-10099, 2022 | 6 | 2022 |
Efficient precharge-free cam match-line architecture design for low power SVV Satyanarayana, S Sriadibhatla Microelectronics, Electromagnetics and Telecommunications: Proceedings of …, 2018 | 6 | 2018 |
Low Power Adaptive FIR Filter Based on Distributed Arithmetic S Ramanathan, G Anand, P Reddy, SA Sridevi | 6 | 2016 |
Dual-chirality GAA-CNTFET-based SCPF-TCAM cell design for low power and high performance SVV Satyanarayana, SR Shailendra, VN Ramakrishnan, S Sriadibhatla Journal of Computational Electronics 18, 1045-1054, 2019 | 5 | 2019 |
Design of TCAM architecture for low power and high performance applications SVV Satyanarayana, S Srıdevı Gazi University Journal of Science 32 (1), 164-173, 2019 | 5 | 2019 |
A comparative study of direct digital frequency synthesizer architectures in 180nm CMOS R Suryavanshi, S Sridevi, B Amrutur 2017 International conference on Microelectronic Devices, Circuits and …, 2017 | 5 | 2017 |