| Investigation of CNTFET based energy efficient fast SRAM cells for edge AI devices Y Alekhya, U Nanda Silicon 14 (14), 8815-8830, 2022 | 7 | 2022 |
| Quasi FGMOS 6T SRAM cell design: A strategy for low power applications A Yalla, U Nanda International Journal of Nanoscience, 2019 | 6 | 2019 |
| Reversible High Speed Binary Content Addressable Memory array design using Transmission Gate Logic A Yalla, U Nanda, CK Pandey, S Ye 2023 3rd International Conference on Artificial Intelligence and Signal …, 2023 | 3 | 2023 |
| Design of 64 bit SRAM using lector technique for low leakage power with read and write enable Y Alekhya, J Sudhakar IOSR Journal of VLSI and Signal Processing (IOSRJVSP) 7, 10-19, 2017 | 2 | 2017 |
| Quasi FGMOS Inverter: A Strategy for low power applications A Yalla, U Nanda 2019 Devices for Integrated Circuit (DevIC), 211-215, 2019 | 1 | 2019 |
| A Dual-Rail Delay-Insensitive IEEE-754 Single-Precision Null Convention Floating Point Multiplier for Low-Power Applications J Sudhakar, Y Alekhya, KS Syamala Innovations in Electronics and Communication Engineering: Proceedings of the …, 2017 | 1 | 2017 |
| Radiation Effects and Their Impact on SRAM Design: A Comprehensive Survey with Contemporary Challenges Y Alekhya, U Nanda, CK Pandey Advanced Ultra Low‐Power Semiconductor Devices: Design and Applications, 261-278, 2023 | | 2023 |
| CNTFET-based Data Independent Power Efficient and Robust 8T SRAM Cell A Yalla, U Nanda ECS Journal of Solid State Science and Technology 12 (6), 061001, 2023 | | 2023 |
| Strategical Survey on Static Random Access Memory: A Bibilometric Study Y Alekhya, U Nanda 2022 2nd International Conference on Intelligent Technologies (CONIT), 1-15, 2022 | | 2022 |
| Design Analysis of SRAM Cell with Improved Noise Margin based on Aspect Ratio Adjustments Y Alekhya, J Sudhakar HELIX 8 (1), 2645-2650, 2018 | | 2018 |
