| FPGA implementation of metastability-based true random number generator H Hata, S Ichikawa IEICE TRANSACTIONS on Information and Systems 95 (2), 426-436, 2012 | 126 | 2012 |
| Semiconductor integrated circuit H Kobayashi, S Ichikawa, Y Ajioka US Patent 5,859,449, 1999 | 79 | 1999 |
| Design and evaluation of hardware pseudo-random number generator MT19937 S Konuma, S Ichikawa IEICE transactions on information and systems 88 (12), 2876-2879, 2005 | 43 | 2005 |
| Converting PLC instruction sequence into logic circuit: A preliminary study S Ichikawa, M Akinaka, R Ikeda, H Yamamoto 2006 IEEE International Symposium on Industrial Electronics 4, 2930-2935, 2006 | 41 | 2006 |
| An FPGA implementation of hard‐wired sequence control system based on PLC software S Ichikawa, M Akinaka, H Hata, R Ikeda, H Yamamoto IEEJ Transactions on Electrical and Electronic Engineering 6 (4), 367-375, 2011 | 38 | 2011 |
| Redundancy in 3D polygon models and its application to digital signature S Ichikawa, H Chiyama, K Akabane UNION Agency, 2002 | 38 | 2002 |
| CPC (Cyclic Pipeline Computer)-an architecture suited for Josephson and pipelined-memory machines K Shimizu, E Goto, S Ichikawa IEEE transactions on computers 38 (6), 825-832, 1989 | 34 | 1989 |
| An execution-time estimation model for heterogeneous clusters Y Kishimoto, S Ichikawa 18th International Parallel and Distributed Processing Symposium, 2004 …, 2004 | 30 | 2004 |
| Optimizing the configuration of a heterogeneous cluster with multiprocessing and execution-time estimation Y Kishimoto, S Ichikawa Parallel Computing 31 (7), 691-710, 2005 | 27 | 2005 |
| Static load balancing of parallel PDE solver for distributed computing environment S Ichikawa, S Yamashita Proc. 13th Int’l Conf. Parallel and Distributed Computing Systems, 399-405, 2000 | 26 | 2000 |
| An analysis of DCM-based true random number generator N Fujieda, M Takeda, S Ichikawa IEEE Transactions on Circuits and Systems II: Express Briefs 67 (6), 1109-1113, 2019 | 22 | 2019 |
| The evaluation of Davidson's digital signature scheme K Hattanda, S Ichikawa IEICE transactions on fundamentals of electronics, communications and …, 2004 | 17 | 2004 |
| A latch-latch composition of metastability-based true random number generator for Xilinx FPGAs N Fujieda, S Ichikawa IEICE Electronics Express 15 (10), 20180386-20180386, 2018 | 16 | 2018 |
| Data dependent circuit for subgraph isomorphism problem S Ichikawa, S Yamamoto Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002 | 16 | 2002 |
| A true random number generator that utilizes thermal noise in a programmable system‐on‐chip (PSoC) S Matsuoka, S Ichikawa, N Fujieda International Journal of Circuit Theory and Applications 49 (10), 3354-3367, 2021 | 14 | 2021 |
| Estimating the optimal configuration of a multi-core cluster: a preliminary study S Ichikawa, S Takagi 2009 International Conference on Complex, Intelligent and Software Intensive …, 2009 | 13 | 2009 |
| Evaluation of the hardwired sequence control system generated by high-level synthesis N Fujieda, S Ichikawa, Y Ishigaki, T Tanaka 2017 IEEE 26th International Symposium on Industrial Electronics (ISIE …, 2017 | 12 | 2017 |
| Data dependent circuit for subgraph isomorphism problem S Ichikawa, S Yamamoto IEICE TRANSACTIONS on Information and Systems 86 (5), 796-802, 2003 | 12 | 2003 |
| Evaluation of accelerator designs for subgraph isomorphism problem S Ichikawa, H Saito, L Udorn, K Konishi Field-Programmable Logic and Applications: The Roadmap to Reconfigurable …, 2000 | 11 | 2000 |
| Pseudorandom rounding for truncated multipliers N Yoshida, E Goto, S Ichikawa IEEE transactions on computers 40 (09), 1065-1067, 1991 | 11 | 1991 |
