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Antonio Liscidini
Antonio Liscidini
在 utoronto.ca 的电子邮件经过验证
标题
引用次数
引用次数
年份
Two-dimensions Vernier time-to-digital converter
L Vercesi, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits 45 (8), 1504-1512, 2010
2082010
A 0.13/spl mu/m CMOS front-end, for DCS1800/UMTS/802.11 bg with multiband positive feedback low-noise amplifier
A Liscidini, M Brandolini, D Sanzogni, R Castello
IEEE Journal of Solid-State Circuits 41 (4), 981-989, 2006
1842006
A 3.6 mW, 90 nm CMOS gated-Vernier time-to-digital converter with an equivalent resolution of 3.2 ps
P Lu, A Liscidini, P Andreani
IEEE journal of solid-state circuits 47 (7), 1626-1635, 2012
1492012
SAW-less analog front-end receivers for TDD and FDD
I Fabiano, M Sosio, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits 48 (12), 3067-3079, 2013
1482013
Single-stage low-power quadrature RF receiver front-end: The LMV cell
A Liscidini, A Mazzanti, R Tonietto, L Vandi, P Andreani, R Castello
IEEE Journal of Solid-State Circuits 41 (12), 2832-2841, 2006
1152006
A variable gain RF front-end, based on a voltage-voltage feedback LNA, for multistandard applications
P Rossi, A Liscidini, M Brandolini, F Svelto
IEEE journal of Solid-State circuits 40 (3), 690-697, 2005
1122005
Low-power quadrature receivers for ZigBee (IEEE 802.15. 4) applications
M Tedeschi, A Liscidini, R Castello
IEEE journal of solid-state circuits 45 (9), 1710-1719, 2010
1092010
An intuitive analysis of phase noise fundamental limits suitable for benchmarking LC oscillators
M Garampazzi, S Dal Toso, A Liscidini, D Manstretta, P Mendez, ...
IEEE Journal of Solid-State Circuits 49 (3), 635-645, 2014
922014
Sub-mW current re-use receiver front-end for wireless sensor network applications
A Selvakumar, M Zargham, A Liscidini
IEEE Journal of Solid-State Circuits 50 (12), 2965-2974, 2015
902015
Time to digital converter based on a 2-dimensions Vernier architecture
A Liscidini, L Vercesi, R Castello
2009 IEEE custom integrated circuits conference, 45-48, 2009
842009
Current-mode, WCDMA channel filter with in-band noise shaping
A Pirola, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits 45 (9), 1770-1780, 2010
802010
A dither-less all digital PLL for cellular transmitters
L Vercesi, L Fanori, F De Bernardinis, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits 47 (8), 1908-1920, 2012
762012
Capacitive degeneration in LC-tank oscillator for DCO fine-frequency tuning
L Fanori, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits 45 (12), 2737-2745, 2010
682010
A 6.7-to-9.2 GHz 55nm CMOS hybrid class-b/class-c cellular TX VCO
L Fanori, A Liscidini, P Andreani
2012 IEEE International Solid-State Circuits Conference, 354-356, 2012
672012
A 2.4 GHz 3.6mW 0.35mm2 Quadrature Front-End RX for ZigBee and WPAN Applications
A Liscidini, M Tedeschi, R Castello
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
582008
3.3 GHz DCO with a frequency resolution of 150Hz for All-digital PLL
L Fanori, A Liscidini, R Castello
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 48-49, 2010
572010
Matrix time-to-digital conversion frequency synthesizer
F Rezzi, A Liscidini
US Patent 7,888,973, 2011
562011
Analysis and design of configurable LNAs in feedback common-gate topologies
A Liscidini, G Martini, D Mastantuono, R Castello
IEEE Transactions on Circuits and Systems II: Express Briefs 55 (8), 733-737, 2008
542008
A current-mode, low out-of-band noise LTE transmitter with a class-A/B power mixer
N Codega, P Rossi, A Pirola, A Liscidini, R Castello
IEEE Journal of Solid-State Circuits 49 (7), 1627-1638, 2014
492014
13.6 A 600μW Bluetooth low-energy front-end receiver in 0.13 μm CMOS technology
A Selvakumar, M Zargham, A Liscidini
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
442015
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