| An efficient floating point multiplier design for high speed applications using Karatsuba algorithm and Urdhva-Tiryagbhyam algorithm S Arish, RK Sharma 2015 International Conference on Signal Processing and Communication (ICSC …, 2015 | 25* | 2015 |
| An efficient binary multiplier design for high speed applications using Karatsuba algorithm and Urdhva-Tiryagbhyam algorithm S Arish, RK Sharma 2015 Global Conference on Communication Technologies (GCCT), 192-196, 2015 | 21 | 2015 |
| Run-time reconfigurable multi-precision floating point multiplier design for high speed, low-power applications S Arish, RK Sharma 2015 International Conference on Signal Processing and Integrated Networks …, 2015 | 15 | 2015 |
| Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications A Sateesan, J Vliegen, J Daemen, N Mentens 2020 23rd Euromicro Conference on Digital System Design (DSD), 2020 | 14 | 2020 |
| Speed Records in Network Flow Measurement on FPGA A Sateesan, J Vliegen, S Scherrer, HC Hsiao, A Perrig, N Mentens 2021 31st International Conference on Field-Programmable Logic and …, 2021 | 13 | 2021 |
| A survey of algorithmic and hardware optimization techniques for vision convolutional neural networks on FPGAs A Sateesan, S Sinha, S KG, AP Vinod Neural Processing Letters 53 (3), 2331-2377, 2021 | 12 | 2021 |
| Optimization of Convolutional Neural Networks on Resource Constrained Devices S Arish, S Sharad, KG Smitha 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019 | 12 | 2019 |
| Low-rate overuse flow tracer (loft): An efficient and scalable algorithm for detecting overuse flows S Scherrer, CY Wu, YH Chiang, B Rothenberger, DE Asoni, A Sateesan, ... 2021 40th International Symposium on Reliable Distributed Systems (SRDS …, 2021 | 11 | 2021 |
| Run-Time-Reconfigurable Multi-Precision Floating-Point Matrix Multiplier Intellectual Property Core on FPGA S Arish, RK Sharma Springer US (CSSP) - International Journal of Circuits, Systems, and Signal …, 2017 | 8 | 2017 |
| Hardware-oriented Optimization of Bloom Filter Algorithms and Architectures for Ultra-high-speed Lookups in Network Applications A Sateesan, J Vliegen, J Daemen, N Mentens Microprocessors and Microsystems, 2022 | 4 | 2022 |
| Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA T Claesen, A Sateesan, J Vliegen, N Mentens 2021 24th Euromicro Conference on Digital System Design (DSD), 2021 | 4 | 2021 |
| DASH: Design Automation for Synthesis and Hardware Generation for CNN A Sateesan, S Sinha, KG Smitha 2020 International Conference on Field-Programmable Technology (ICFPT), 2020 | 3 | 2020 |
| Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware A Sateesan, J Biesmans, T Claesen, J Vliegen, N Mentens Microprocessors and Microsystems 98, 104782, 2023 | 2 | 2023 |
| SoK - Network Intrusion Detection on FPGA L Le Jeune, A Sateesan, MM Rabbani, T Goedeme, J Vliegen, N Mentens Security, Privacy, and Applied Cryptography Engineering, 242-261, 2022 | 1 | 2022 |
| FPGA design for large flow detection in high speed networks A Sateesan | | 2024 |
| ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks S Scherrer, J Vliegen, A Sateesan, HC Hsiao, N Mentens, A Perrig 2023 42nd International Symposium on Reliable Distributed Systems (SRDS …, 2023 | | 2023 |
| Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications M Hassan, A Sateesan, J Vliegen, S Picek, N Mentens Applications of Evolutionary Computation (EvoApplications 2023) 13989, 302-318, 2023 | | 2023 |
| An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security A Sateesan, J Vliegen, N Mentens International Conference on Security, Privacy, and Applied Cryptography …, 2022 | | 2022 |
| 2023 42nd International Symposium on Reliable Distributed Systems (SRDS)| 979-8-3503-2910-0/23/$31.00© 2023 IEEE| DOI: 10.1109/SRDS60354. 2023.00034 D Abbott, A Abuadbba, M Ahn, S Al-Kiswany, F Alves, E Anceaume, ... | | |
| A Genetic Programming Approach for Hardware-Oriented Hash Functions for Network Security Applications M HASSAN, A Sateesan, J Vliegen, S Picek, N Mentens Available at SSRN 4688976, 0 | | |
Jo VliegenResearcher Expert @COSIC/ES&S, ESAT, KULeuven, Belgium在 esat.kuleuven.be 的电子邮件经过验证
