| Control flow modeling in statistical simulation for accurate and efficient processor design studies L Eeckhout, RH Bell Jr, B Stougie, K De Bosschere, LK John ACM SIGARCH Computer Architecture News 32 (2), 350, 2004 | 158 | 2004 |
| Data and control encryption RH Bell, LB Capps Jr, MJ Shapiro US Patent 8,379,847, 2013 | 137 | 2013 |
| Improved automatic testcase synthesis for performance model validation RH Bell Jr, LK John Proceedings of the 19th annual international conference on Supercomputing …, 2005 | 115 | 2005 |
| Performance cloning: A technique for disseminating proprietary applications as benchmarks A Joshi, L Eeckhout, RH Bell, L John 2006 IEEE International Symposium on Workload Characterization, 105-115, 2006 | 81 | 2006 |
| Energy-aware job scheduling for cluster environments RH Bell, L Brochard, DR DeSota, RD Panda, F Thomas US Patent 8,612,984, 2013 | 66 | 2013 |
| Distilling the essence of proprietary workloads into miniature benchmarks A Joshi, L Eeckhout, RH Bell Jr, LK John ACM Transactions on Architecture and Code Optimization (TACO) 5 (2), 1-33, 2008 | 66 | 2008 |
| Multicore processor and method of use that adapts core functions based on workload execution RH Bell, LB Capps Jr, TE Cook, GG Daves, RE Newhart, MA Paolini, ... US Patent 8,327,126, 2012 | 64 | 2012 |
| Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics LB Capps Jr, RH Bell, MJ Shapiro US Patent 7,962,770, 2011 | 58 | 2011 |
| CDMA as a multiprocessor interconnect strategy RH Bell, CY Kang, L John, EE Swartzlander Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems …, 2001 | 51 | 2001 |
| Hybrid storage subsystem with mixed placement of file contents RH Bell, MC Chiang, HL Hua, MS Srinivas US Patent 8,438,334, 2013 | 46 | 2013 |
| Method for autonomic workload distribution on a multicore processor RH Bell, LB Capps Jr, TE Cook, TJ Dewkett, N Nayar, RE Newhart, ... US Patent 7,996,346, 2011 | 44 | 2011 |
| Variable cache line size management RH Bell, WTT Chen, DG Flemming, HL Hua, WA Maron, MS Srinivas US Patent 8,935,478, 2015 | 43 | 2015 |
| Dynamic instruction execution using distributed transaction priority registers LB Capps Jr, RH Bell US Patent App. 11/946,615, 2009 | 43 | 2009 |
| Dynamic instruction execution based on transaction priority tagging LB Capps Jr, RH Bell US Patent 8,886,918, 2014 | 42 | 2014 |
| Variable cache line size management RH Bell, WTT Chen, DG Flemming, HL Hua, WA Maron, MS Srinivas US Patent 8,943,272, 2015 | 39 | 2015 |
| Configuring plural cores to perform an instruction having a multi-core characteristic LB Capps Jr, MJ Shapiro, RH Bell, TE Cook, WE Burky US Patent 8,495,342, 2013 | 39 | 2013 |
| Multicore processor and method of use that configures core functions based on executing instructions LB Capps Jr, RE Newhart, TE Cook, RH Bell, MJ Shapiro US Patent 9,507,640, 2016 | 38 | 2016 |
| Method and system for specualtively sending processor-issued store operations to a store queue with full signal asserted RH Bell, TM Capasso, GL Guthrie, H Shen, JA Stuecheli US Patent 8,352,712, 2013 | 37 | 2013 |
| Method and cache system with soft I-MRU member protection scheme during make MRU allocation RH Bell, JA Stuecheli US Patent 7,805,574, 2010 | 33 | 2010 |
| Energy-aware job scheduling for cluster environments RH Bell, L Brochard, DR DeSota, RD Panda, F Thomas US Patent 8,527,997, 2013 | 31 | 2013 |
Lizy Kurian JohnTruchard Foundation Chair and Professor at UT Austin ECE在 ece.utexas.edu 的电子邮件经过验证
