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Bhavya Daya
Bhavya Daya
在 csail.mit.edu 的电子邮件经过验证
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引用次数
引用次数
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SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering
BK Daya, CHO Chen, S Subramanian, WC Kwon, S Park, T Krishna, ...
ACM SIGARCH Computer Architecture News 42 (3), 25-36, 2014
1832014
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI
S Park, T Krishna, CH Chen, B Daya, A Chandrakasan, LS Peh
Proceedings of the 49th Annual Design Automation Conference, 398-405, 2012
1202012
Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling
BK Daya, L Peh, AP Chandrakasan
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
342016
Towards high-performance bufferless nocs with scepter
BK Daya, LS Peh, AP Chandrakasan
IEEE Computer Architecture Letters 15 (1), 62-65, 2015
242015
Low-power on-chip network providing guaranteed services for snoopy coherent and artificial neural network systems
BK Daya, LS Peh, AP Chandrakasan
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
102017
Parallelization of Two-Dimensional Skeletonization Algorithms
B Daya
Journal of Undergraduate Research 9 (4), 2-3, 2008
92008
Scorpio: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect
CHO Chen, S Park, S Subramanian, T Krishna, B Daya, WC Kwon, ...
2014 IEEE Hot Chips 26 Symposium (HCS), 1-20, 2014
42014
SC²EPTON: high-performance and scalable, low-power and intelligent, ordered Mesh on-chip network
BK Daya
Massachusetts Institute of Technology, 2015
2015
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