| Tnn7: A custom macro suite for implementing highly optimized designs of neuromorphic tnns H Nair, P Vellaisamy, S Bhasuthkar, JP Shen 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 152-157, 2022 | 7 | 2022 |
| tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI H Nair, P Vellaisamy, A Chen, J Finn, A Li, M Trivedi, JP Shen 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | 3 | 2023 |
| Realtime Person Identification via Gait Analysis S Venkatachalam, H Nair, P Vellaisamy, Y Zhou, Z Youssfi, JP Shen arXiv preprint arXiv:2404.15312, 2024 | 2 | 2024 |
| tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit P Vellaisamy, H Nair, J Finn, M Trivedi, A Chen, A Li, TH Lin, P Wang, ... 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 1-6, 2023 | 2 | 2023 |
| Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators P Vellaisamy, H Nair, D Wu, S Blanton, JP Shen 2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 661-665, 2024 | 1 | 2024 |
| TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering P Vellaisamy, H Nair, V Ratnakaram, D Gupta, JP Shen IEEE Transactions on Circuits and Systems II: Express Briefs, 2024 | 1 | 2024 |
| Towards a design framework for tnn-based neuromorphic sensory processing units P Vellaisamy, JP Shen arXiv preprint arXiv:2205.14248, 2022 | 1 | 2022 |
| OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference H Nair, P Vellaisamy, TH Lin, P Wang, S Blanton, JP Shen arXiv preprint arXiv:2402.19376, 2024 | | 2024 |
| A Custom 7nm CMOS Standard Cell Library for Implementing TNN-based Neuromorphic Processors H Nair, P Vellaisamy, S Bhasuthkar, JP Shen arXiv preprint arXiv:2012.05419, 2020 | | 2020 |
| Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference H Nair, P Vellaisamy, TH Lin, P Wang, S Blanton, JP Shen | | |
| A Digital SRAM Computing-in-Memory Design Utilizing Activation Unstructured Sparsity for High-Efficient DNN Inference................................................ 1 Baiqing … G Ammes, P Butzen, A Reis, R Ribas, MM Unit, P Vellaisamy, H Nair, ... | | |
