GeSn quantum well p-channel tunneling FETs fabricated on Si (001) and (111) with improved subthreshold swing G Han, Y Wang, Y Liu, C Zhang, Q Feng, M Liu, S Zhao, B Cheng, ... IEEE Electron Device Letters 37 (6), 701-704, 2016 | 67 | 2016 |
Design of GeSn-based heterojunction-enhanced N-channel tunneling FET with improved subthreshold swing and ON-state current M Liu, Y Liu, H Wang, Q Zhang, C Zhang, S Hu, Y Hao, G Han IEEE Transactions on Electron Devices 62 (4), 1262-1268, 2015 | 60 | 2015 |
Artificial synapses based on ferroelectric Schottky barrier field-effect transistors for neuromorphic applications F Xi, Y Han, M Liu, JH Bae, A Tiedemann, D Grützmacher, QT Zhao ACS applied materials & interfaces 13 (27), 32005-32012, 2021 | 50 | 2021 |
Strained GeSn p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors With In Situ Si2H6 Surface Passivation: Impact of Sn Composition Y Liu, J Yan, H Wang, Q Zhang, M Liu, B Zhao, C Zhang, B Cheng, Y Hao, ... IEEE Transactions on Electron Devices 61 (11), 3639-3645, 2014 | 34 | 2014 |
Undoped Ge0.92Sn0.08 quantum well PMOSFETs on (001), (011) and (111) substrates with in situ Si2H6 passivation: High hole mobility and dependence of … M Liu, G Han, Y Liu, C Zhang, H Wang, X Li, J Zhang, B Cheng, Y Hao 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014 | 34 | 2014 |
Performance improvement in novel germanium–tin/germanium heterojunction-enhanced p-channel tunneling field-effect transistor H Wang, Y Liu, M Liu, Q Zhang, C Zhang, X Ma, J Zhang, Y Hao, G Han Superlattices and Microstructures 83, 401-410, 2015 | 24 | 2015 |
Epitaxial GeSn/Ge vertical nanowires for p-type field-effect transistors with enhanced performance M Liu, D Yang, A Shkurmanov, JH Bae, V Schlykow, JM Hartmann, ... ACS Applied Nano Materials 4 (1), 94-101, 2020 | 19 | 2020 |
Vertical Ge Gate-All-Around Nanowire pMOSFETs with a Diameter down to 20 nm M Liu, S Scholz, A Hardtdegen, JH Bae, JM Hartmann, J Knoch, ... IEEE Electron Device Letter, 2020 | 18 | 2020 |
Vertical GeSn nanowire MOSFETs for CMOS beyond silicon M Liu, Y Junk, Y Han, D Yang, JH Bae, M Frauenrath, JM Hartmann, ... Communications Engineering 2 (1), 7, 2023 | 17 | 2023 |
Diameter scaling of vertical Ge gate-all-around nanowire pMOSFETs M Liu, F Lentz, S Trellenkamp, JM Hartmann, J Knoch, D Grützmacher, ... IEEE Transactions on Electron Devices 67 (7), 2988-2994, 2020 | 17 | 2020 |
Investigation of performance enhancement in InAs/InGaAs heterojunction-enhanced N-channel tunneling field-effect transistor G Han, B Zhao, Y Liu, H Wang, M Liu, C Zhang, S Hu, Y Hao Superlattices and Microstructures 88, 90-98, 2015 | 11 | 2015 |
First Demonstration of Vertical Ge 0.92 Sn 0.08/Ge and Ge GAA Nanowire pMOSFETs with Low SS of 66 mV/dec and Small DIBL of 35 mV/V M Liu, S Scholz, K Mertens, JH Bae, JM Hartmann, J Knoch, D Buca, ... 2019 IEEE International Electron Devices Meeting (IEDM), 29.6. 1-29.6. 4, 2019 | 10 | 2019 |
Relaxed germanium-tin P-channel tunneling field-effect transistors fabricated on Si: impacts of Sn composition and uniaxial tensile strain G Han, Y Wang, Y Liu, H Wang, M Liu, C Zhang, J Zhang, B Cheng, ... AIP Advances 5 (5), 2015 | 9 | 2015 |
Mobility enhancement in undoped Ge0. 92Sn0. 08 quantum well p-channel metal-oxide-semiconductor field-effect transistor fabricated on (111)-oriented substrate Y Liu, J Yan, M Liu, H Wang, Q Zhang, B Zhao, C Zhang, B Cheng, Y Hao, ... Semiconductor Science and Technology 29 (11), 115027, 2014 | 9 | 2014 |
Vertical heterojunction Ge0. 92Sn0. 08/Ge gate-all-around nanowire pMOSFETs with NiGeSn contact M Liu, K Mertens, N von den Driesch, V Schlykow, T Grap, F Lentz, ... Solid-State Electronics 168, 107716, 2020 | 8 | 2020 |
Phase evolution of ultra-thin Ni silicide films on CF4 plasma immersion ion implanted Si LT Zhao, M Liu, QH Ren, CH Liu, Q Liu, LL Chen, Y Spiegel, F Torregrosa, ... Nanotechnology 31 (20), 205201, 2020 | 5 | 2020 |
Vertical heterojunction Ge0. 92 Sn0. 08/Ge GAA nanowire pMOSFETs: Low SS of 67 mV/dec, small DIBL of 24 mV/V and highest gm, ext of 870 μS/μm M Liu, V Schlykow, JM Hartmann, J Knoch, D Grützmacher, D Buca, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 4 | 2020 |
Realization of vertical Ge nanowires for gate-all-around transistors M Liu, K Mertens, S Glass, S Mantl, D Buca, QT Zhao, S Trellenkamp 2018 Joint International EUROSOI Workshop and International Conference on …, 2018 | 3 | 2018 |
Germanium-Tin P-channel tunneling field-effect transistors: Impacts of biaxial tensile strain and surface orientation H Wang, G Han, Y Liu, M Liu, C Zhang, J Zhang, X Ma, Y Hao 2015 International Symposium on VLSI Technology, Systems and Applications, 1-2, 2015 | 2 | 2015 |
Germanium-tin alloys: Applications in microelectronics and photonics G Han, M Liu, Q Zhang, Y Liu, J Yan, B Cheng, Y Hao Journal of Nanoelectronics and Optoelectronics 10 (1), 88-92, 2015 | 2 | 2015 |