| RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ... Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 508 | 2013 |
| Google workloads for consumer devices: Mitigating data movement bottlenecks A Boroumand, S Ghose, Y Kim, R Ausavarungnirun, E Shiu, R Thakur, ... Proceedings of the Twenty-Third International Conference on Architectural …, 2018 | 383 | 2018 |
| Staged memory scheduling: achieving high performance and scalability in heterogeneous systems R Ausavarungnirun, KKW Chang, L Subramanian, GH Loh, O Mutlu Proceedings of the 39th Annual International Symposium on Computer …, 2012 | 319 | 2012 |
| Row buffer locality aware caching policies for hybrid memories HB Yoon, J Meza, R Ausavarungnirun, RA Harding, O Mutlu 2012 IEEE 30th International Conference on Computer Design (ICCD), 337-344, 2012 | 267 | 2012 |
| Processing data where it makes sense: Enabling in-memory computation O Mutlu, S Ghose, J Gómez-Luna, R Ausavarungnirun Microprocessors and Microsystems 67, 28-41, 2019 | 261 | 2019 |
| A modern primer on processing in memory O Mutlu, S Ghose, J Gómez-Luna, R Ausavarungnirun Emerging computing: from devices to systems: looking beyond Moore and Von …, 2022 | 190 | 2022 |
| Managing GPU concurrency in heterogeneous architectures O Kayiran, NC Nachiappan, A Jog, R Ausavarungnirun, MT Kandemir, ... 2014 47th annual IEEE/ACM international symposium on microarchitecture, 114-126, 2014 | 174 | 2014 |
| MinBD: Minimally-buffered deflection routing for energy-efficient interconnect C Fallin, G Nazario, X Yu, K Chang, R Ausavarungnirun, O Mutlu 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 1-10, 2012 | 159 | 2012 |
| Mosaic: a GPU memory manager with application-transparent support for multiple page sizes R Ausavarungnirun, J Landgraf, V Miller, S Ghose, J Gandhi, ... Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 151 | 2017 |
| Decoupled direct memory access: Isolating CPU and IO traffic by leveraging a dual-data-port DRAM D Lee, L Subramanian, R Ausavarungnirun, J Choi, O Mutlu Proceedings of the 24th International Conference on Parallel Architecture …, 2015 | 150 | 2015 |
| Design-induced latency variation in modern DRAM chips: Characterization, analysis, and latency reduction mechanisms D Lee, S Khan, L Subramanian, S Ghose, R Ausavarungnirun, ... Proceedings of the ACM on Measurement and Analysis of Computing Systems 1 (1 …, 2017 | 148 | 2017 |
| Application-to-core mapping policies to reduce memory system interference in multi-core systems R Das, R Ausavarungnirun, O Mutlu, A Kumar, M Azimi 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 148 | 2013 |
| GenASM: A high-performance, low-power approximate string matching acceleration framework for genome sequence analysis DS Cali, GS Kalsi, Z Bingöl, C Firtina, L Subramanian, JS Kim, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 135 | 2020 |
| A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps N Vijaykumar, G Pekhimenko, A Jog, A Bhowmick, R Ausavarungnirun, ... ACM SIGARCH Computer Architecture News 43 (3S), 41-53, 2015 | 129 | 2015 |
| CoNDA: Efficient cache coherence support for near-data accelerators A Boroumand, S Ghose, M Patel, H Hassan, B Lucia, R Ausavarungnirun, ... Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 123 | 2019 |
| Mask: Redesigning the gpu memory hierarchy to support multi-application concurrency R Ausavarungnirun, V Miller, J Landgraf, S Ghose, J Gandhi, A Jog, ... Proceedings of the Twenty-Third International Conference on Architectural …, 2018 | 108 | 2018 |
| HAT: Heterogeneous adaptive throttling for on-chip networks KKW Chang, R Ausavarungnirun, C Fallin, O Mutlu 2012 IEEE 24th International Symposium on Computer Architecture and High …, 2012 | 98 | 2012 |
| Sisa: Set-centric instruction set architecture for graph mining on processing-in-memory systems M Besta, R Kanakagiri, G Kwasniewski, R Ausavarungnirun, J Beránek, ... MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 96 | 2021 |
| Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance R Ausavarungnirun, S Ghose, O Kayıran, GH Loh, CR Das, MT Kandemir, ... Proceedings of the 24th International Conference on Parallel Architectures …, 2015 | 94 | 2015 |
| A framework for memory oversubscription management in graphics processing units C Li, R Ausavarungnirun, CJ Rossbach, Y Zhang, O Mutlu, Y Guo, J Yang Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 85 | 2019 |
