| Defeating UCI: Building stealthy and malicious hardware C Sturton, M Hicks, D Wagner, ST King 2011 IEEE symposium on security and privacy, 64-77, 2011 | 175 | 2011 |
| Specs: A lightweight runtime mechanism for protecting software from security-critical processor bugs M Hicks, C Sturton, ST King, JM Smith Proceedings of the Twentieth International Conference on Architectural …, 2015 | 86 | 2015 |
| End-to-end automated exploit generation for validating the security of processor designs R Zhang, C Deutschbein, P Huang, C Sturton 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 66 | 2018 |
| Identifying security critical properties for the dynamic verification of a processor R Zhang, N Stanley, C Griggs, A Chi, C Sturton ACM SIGARCH Computer Architecture News 45 (1), 541-554, 2017 | 46 | 2017 |
| On voting machine design for verification and testability C Sturton, S Jha, SA Seshia, D Wagner Proceedings of the 16th ACM conference on Computer and communications …, 2009 | 36 | 2009 |
| Usability of augmented reality for revealing secret messages to users but not their devices SJ Andrabi, MK Reiter, C Sturton Eleventh Symposium On Usable Privacy and Security (SOUPS 2015), 89-102, 2015 | 24 | 2015 |
| Transys: Leveraging common security properties across hardware designs R Zhang, C Sturton 2020 IEEE Symposium on Security and Privacy (SP), 1713-1727, 2020 | 19 | 2020 |
| Mining security critical linear temporal logic specifications for processors C Deutschbein, C Sturton 2018 19th International Workshop on Microprocessor and SOC Test and …, 2018 | 14 | 2018 |
| Isadora: Automated information flow property generation for hardware designs C Deutschbein, A Meza, F Restuccia, R Kastner, C Sturton Proceedings of the 5th Workshop on Attacks and Solutions in Hardware …, 2021 | 13 | 2021 |
| On Using Drivers' Eyes to Predict Accident-Causing Drowsiness Levels A Byrnes, C Sturton 2018 21st International Conference on Intelligent Transportation Systems …, 2018 | 11 | 2018 |
| A recursive strategy for symbolic execution to find exploits in hardware designs R Zhang, C Sturton Proceedings of the 2018 ACM SIGPLAN International Workshop on Formal Methods …, 2018 | 11 | 2018 |
| Weight, Weight, Don't Tell Me: Using Scales to Select Ballots for Auditing. C Sturton, DA Wagner EVT/WOTE, 2009 | 11 | 2009 |
| A system to verify network behavior of known cryptographic clients A Chi, RA Cochran, M Nesfield, MK Reiter, C Sturton 14th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2017 | 9 | 2017 |
| Verification with small and short worlds R Sinha, C Sturton, P Maniatis, SA Seshia, D Wagner 2012 Formal Methods in Computer-Aided Design (FMCAD), 68-77, 2012 | 9 | 2012 |
| Automated analysis of election audit logs P Baxter, A Edmundson, K Ortiz, AM Quevedo, S Rodrıguez, C Sturton, ... Proceeding EVT/WOTE'12 Proceedings of the 2012 international conference on …, 2012 | 9 | 2012 |
| Toward hardware security property generation at scale C Deutschbein, A Meza, F Restuccia, M Gregoire, R Kastner, C Sturton IEEE Security & Privacy 20 (3), 43-51, 2022 | 7 | 2022 |
| FinalFilter: Asserting security properties of a processor at runtime C Sturton, M Hicks, ST King, JM Smith IEEE Micro 39 (4), 35-42, 2019 | 7 | 2019 |
| Evaluating security specification mining for a cisc architecture C Deutschbein, C Sturton 2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020 | 6 | 2020 |
| Symbolic software model validation C Sturton, R Sinha, THY Dang, S Jain, M McCoyd, WY Tan, P Maniatis, ... 2013 Eleventh ACM/IEEE International Conference on Formal Methods and Models …, 2013 | 5 | 2013 |
| Isadora: automated information-flow property generation for hardware security verification C Deutschbein, A Meza, F Restuccia, R Kastner, C Sturton Journal of Cryptographic Engineering 13 (4), 391-407, 2023 | 4 | 2023 |
