| high performance cmos schmitt trigger n ramanjaneyulu r rohith kumar reddy international journal of engineering research and applications 2 (4), 2321-2324, 2012 | 5* | 2012 |
| DDoS attack prediction using a honey badger optimization algorithm based feature selection and Bi-LSTM in cloud environment O Pandithurai, C Venkataiah, S Tiwari, N Ramanjaneyulu Expert Systems with Applications 241, 122544, 2024 | 4 | 2024 |
| Design of high performance arithmetic and logic circuits in DSM technology S Govindarajulu, TJ Prasad, N Ramanjaneyulu International Journal of Engineering and Technology 2 (4), 285-291, 2010 | 3 | 2010 |
| Enhancing performance of dual-gate FinFET with high-K gate dielectric materials in 5 nm technology: a simulation study MVG Rao, N Ramanjaneyulu, B Pydi, U Soma, KR Babu, SH Prasad Transactions on Electrical and Electronic Materials 24 (6), 557-569, 2023 | 2 | 2023 |
| HECC‐ABE: A novel blockchain‐based IoT healthcare data storage using hybrid cryptography schemes with key optimization by hybrid meta‐heuristic algorithm AK Dubey, N Ramanjaneyulu, M Saraswat, G Brammya, C Govindasamy, ... Transactions on Emerging Telecommunications Technologies 34 (10), e4839, 2023 | 2 | 2023 |
| Experimental investigations on lightweight self-compacting concrete produced with sintered fly ash aggregate N Ramanjaneyulu, B Desai, MS Rao Int J Eng Technol Manag Sci 5 (5), 14-19, 2021 | 1 | 2021 |
| Design of a Three Stage Ring VCO in 0.18 µm CMOS under PVT Variations N Ramanjaneyulu, D Satyanarayana, K SatyaPrasad. International Journal of Computer Applications 170 (8), 35-39, 2017 | 1 | 2017 |
| Design of a 3.4 GHz Wide-Tuning-Range VCO in 0.18 μm CMOS N Ramanjaneyulu, D Satyanarayana, K Satya Prasad Computer Communication, Networking and Internet Security: Proceedings of …, 2017 | 1 | 2017 |
| Effect of Elevated Temperature on the Lightweight Aggregate Fibre Reinforced Self-Consolidating Concrete N Ramanjaneyulu, MVS Rao, VB Desai CVR Journal of Science and Technology 25 (1), 1-9, 2023 | | 2023 |
| Design and performance analysis of buffer inserted on-chip global nano interconnects in VDSM technologies C Venkataiah, N Ramanjaneyulu, YM Rao, VNVS Prakash, MKL Murthy, ... Nanotechnology for Environmental Engineering 7 (3), 775-781, 2022 | | 2022 |
| Analysis of delay cell based voltage controlled Ring Oscillator in CMOS Ramanjaneyulu N.,Satyanarayana D., Satya Prasad K. Journal of mechanics of continua and mathematical sciences, 342-356, 2020 | | 2020 |
| A 3.4 GHZ FAST-LOCKING PLL USING TRANSMISSION GATE CHARGE-PUMP IN 0.18 µM CMOS FOR HDMI APPLICATIONS Ningampalli Ramanjaneyulu.,Donti Satyanarayana.,Kodati Satya Prasad. | | 2018 |
| Operation of the Low Power Sub-Threshold SRAM Cell Architecture BP KUMAR, N RAMANJANEYULU | | 2015 |
| Design of PFD, CP and FD circuits for 3.4GHz PLL using 0.18µm CMOS Technology DDSDKSP Mr.N.Ramanjaneyulu International Journal of Applied Engineering Research (IJAER) 10 (14), 34490 …, 2015 | | 2015 |
| Efficient Resource Allocation for Emerging Wireless Networks B PRADEEP, N RAMANJANEYULU | | 2014 |
| A Novel Low Power Implicit P-FF Design Using Conditional Pulse-Enhancement Technique D PRABHALLIKA, N RAMANJANEYULU IJESC 2 (9), 1-5, 2013 | | 2013 |
| Visual Quality Improvement of an Image/Video in Web Application N Sravani, N Ramanjaneyulu IOSRJECE 2 (3), 07-18, 2012 | | 2012 |
| energy efficient low voltage swing domino logic circuits in DSM technology NR S.Govindarajulu,T.Jayachandra prasad Emerging trends in signal processing and VLSI design, 946-951, 2010 | | 2010 |
| Flexural and cracking behavior of reinforced lightweight self-compacting concrete beams made with LECA aggregate R Ningampalli, MVS Rao, VB Desai Journal of Sustainable Construction Materials and Technologies 9 (2), 159-169, 0 | | |
