Leandojo: Theorem proving with retrieval-augmented language models K Yang, A Swope, A Gu, R Chalamala, P Song, S Yu, S Godil, RJ Prenger, ... Advances in Neural Information Processing Systems 36, 2024 | 116 | 2024 |
Accelerating chip design with machine learning B Khailany Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 33-33, 2020 | 74 | 2020 |
CongestionNet: Routing congestion prediction using deep graph neural networks R Kirby, S Godil, R Roy, B Catanzaro 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019 | 68 | 2019 |
Can q-learning with graph networks learn a generalizable branching heuristic for a sat solver? V Kurin, S Godil, S Whiteson, B Catanzaro Advances in Neural Information Processing Systems 33, 9608-9621, 2020 | 63 | 2020 |
PrefixRL: Optimization of parallel prefix circuits using deep reinforcement learning R Roy, J Raiman, N Kant, I Elkin, R Kirby, M Siu, S Oberman, S Godil, ... 2021 58th ACM/IEEE Design Automation Conference (DAC), 853-858, 2021 | 38 | 2021 |
Improving SAT solver heuristics with graph networks and reinforcement learning V Kurin, S Godil, S Whiteson, B Catanzaro | 33 | 2019 |
Deep predictive coverage collection R Roy, C Duvedi, S Godil, M Williams Proceedings of the design and verification conference and exhibition US (DVCon), 2018 | 13 | 2018 |
Congestionnet: Routing congestion prediction using deep graph neural networks. In 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC) R Kirby, S Godil, R Roy, B Catanzaro IEEE, 2019 | 10 | 2019 |
Optimizing vlsi implementation with reinforcement learning-iccad special session paper H Ren, S Godil, B Khailany, R Kirby, H Liao, S Nath, J Raiman, R Roy 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-6, 2021 | 9 | 2021 |
Dynamically optimized test generation using machine learning R Roy, M Benipal, S Godil Proceedings of the Design and Verification Conference and Exhibition United …, 2021 | 7 | 2021 |
Deep Stalling using a Coverage Driven Genetic Algorithm Framework S Dhodhi, D Chatterjee, E Hill, S Godil 2021 IEEE 39th VLSI Test Symposium (VTS), 1-4, 2021 | 4 | 2021 |
Guiding global placement with reinforcement learning R Kirby, K Nottingham, R Roy, S Godil, B Catanzaro arXiv preprint arXiv:2109.02631, 2021 | 3 | 2021 |
Utilizing Assertion Synthesis to Achieve an Automated Assertion-Based Verification Methodology for Complex Graphics Chip Designs P Chatterjee, S Godil, P Nelson, Y Lu The 47th Design Automation Conference, User Track, June 2010, 2010 | 3 | 2010 |
Polaris: A Safety-focused LLM Constellation Architecture for Healthcare S Mukherjee, P Gamble, MS Ausin, N Kant, K Aggarwal, N Manjunath, ... arXiv preprint arXiv:2403.13313, 2024 | 1 | 2024 |
GraPhSyM: Graph Physical Synthesis Model A Agiza, R Roy, TD Ene, S Godil, S Reda, B Catanzaro 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 1 | 2023 |
Data path circuit design using reinforcement learning R Roy, S Godil, J Raiman, N Kant, I Elkin, MY Siu, R Kirby, S Oberman, ... US Patent App. 17/517,612, 2023 | 1 | 2023 |
Machine Learning for Logic Synthesis R Roy, S Godil Machine Learning Applications in Electronic Design Automation, 183-204, 2022 | 1 | 2022 |
Multi-objective Reinforcement Learning with Adaptive Pareto Reset for Prefix Adder Design J Song, R Roy, J Raiman, R Kirby, N Kant, S Godil, B Catanzaro Workshop on ML for Systems at NeurIPS, 2022 | 1 | 2022 |
CircuitVAE: Efficient and Scalable Latent Circuit Optimization J Song, A Swope, R Kirby, R Roy, S Godil, J Raiman, B Catanzaro arXiv preprint arXiv:2406.09535, 2024 | | 2024 |