Rodinia: A benchmark suite for heterogeneous computing S Che, M Boyer, J Meng, D Tarjan, JW Sheaffer, SH Lee, K Skadron Workload Characterization, 2009. IISWC 2009. IEEE International Symposium on …, 2009 | 3690 | 2009 |
A performance study of general-purpose applications on graphics processors using CUDA S Che, M Boyer, J Meng, D Tarjan, JW Sheaffer, K Skadron Journal of parallel and distributed computing 68 (10), 1370-1380, 2008 | 921 | 2008 |
A characterization of the Rodinia benchmark suite with comparison to contemporary CMP workloads S Che, JW Sheaffer, M Boyer, LG Szafaryn, L Wang, K Skadron Workload Characterization (IISWC), 2010 IEEE International Symposium on, 1-11, 2010 | 416 | 2010 |
Automated dynamic analysis of CUDA programs M Boyer, K Skadron, W Weimer Third Workshop on Software Tools for MultiCore Systems, 33, 2008 | 135 | 2008 |
Load Balancing in a Changing World: Dealing with Heterogeneity and Performance Variability M Boyer, K Skadron, S Che, N Jayasena Proceedings of the ACM International Conference on Computing Frontiers, 21, 2013 | 97 | 2013 |
Accelerating leukocyte tracking using CUDA: A case study in leveraging manycore coprocessors M Boyer, D Tarjan, ST Acton, K Skadron Parallel & Distributed Processing, 2009. IPDPS 2009. IEEE International …, 2009 | 91 | 2009 |
Dynamic Heterogeneous Scheduling Decisions Using Historical Runtime Data C Gregg, M Boyer, K Hazelwood, K Skadron | 86 | 2011 |
Improving GPU Performance Prediction with Data Transfer Modeling M Boyer, J Meng, K Kumaran Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW …, 2013 | 79 | 2013 |
Federation: Repurposing scalar cores for out-of-order instruction issue D Tarjan, M Boyer, K Skadron Proceedings of the 45th annual Design Automation Conference, 772-775, 2008 | 70 | 2008 |
Implementing a leading loads performance predictor on commodity processors B Su, JL Greathouse, J Gu, M Boyer, L Shen, Z Wang Proceedings of the 2014 USENIX conference on USENIX Annual Technical …, 2014 | 47 | 2014 |
Federation: Out-of-order execution using simple in-order cores D Tarjan, M Boyer, K Skadron University of Virginia, Department of Computer Science, Tech. Rep. CS-2007-11, 2007 | 20 | 2007 |
Prefetching Techniques for Near-memory Throughput Processors R Panda, Y Eckert, N Jayasena, O Kayiran, M Boyer, LK John Proceedings of the 2016 International Conference on Supercomputing, 40, 2016 | 16 | 2016 |
Federation: Boosting per-thread performance of throughput-oriented manycore architectures M Boyer, D Tarjan, K Skadron ACM Transactions on Architecture and Code Optimization (TACO) 7 (4), 19, 2010 | 15 | 2010 |
Improving Resource Utilization in Heterogeneous CPU-GPU Systems M Boyer University of Virginia, 2013 | 10 | 2013 |
Automatic intra-application load balancing for heterogeneous systems M Boyer, S Che, K Skadron, J Gummaraju, N Jayasena AMD Fusion Developer Summit, 2011 | 7 | 2011 |
Infrastructure to support accelerator computation models for active storage S Che, S Gurumurthi, MW Boyer US Patent App. 14/709,915, 2015 | 2 | 2015 |
Handheld Campus Tour Guide M Boyer | 1 | 2006 |
Using ATACS for Verification of Hazard-Freedom of Phased Logic Wrappers M Boyer | | 2004 |
Determining the Optimal Process Technology for Performance-Constrained Circuits MW Boyer, SK Ghosh | | |
Background Paper: Wireless Ethernet Localization M Boyer | | |