| Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching J Diemer, D Thiele, R Ernst 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), 1-10, 2012 | 134 | 2012 |
| Formal worst-case timing analysis of Ethernet TSN's time-aware and peristaltic shapers D Thiele, R Ernst, J Diemer 2015 IEEE Vehicular Networking Conference (VNC), 251-258, 2015 | 119 | 2015 |
| Compositional performance analysis in python with pycpa J Diemer, P Axer, R Ernst Proc. WATERS, 27-32, 2012 | 82 | 2012 |
| IDAMC: A NoC for mixed criticality systems S Tobuschat, P Axer, R Ernst, J Diemer 2013 IEEE 19th international conference on embedded and real-time computing …, 2013 | 72 | 2013 |
| Modeling of Ethernet AVB networks for worst-case timing analysis J Diemer, J Rox, R Ernst IFAC Proceedings Volumes 45 (2), 848-853, 2012 | 69 | 2012 |
| Back suction: Service guarantees for latency-sensitive on-chip networks J Diemer, R Ernst 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 155-162, 2010 | 69 | 2010 |
| Exploiting shaper context to improve performance bounds of ethernet avb networks P Axer, D Thiele, R Ernst, J Diemer Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 48 | 2014 |
| IDAMC: A many-core platform with run-time monitoring for mixed-criticality B Motruk, J Diemer, R Buchty, R Ernst, M Berekovic 2012 IEEE 14th International Symposium on High-Assurance Systems Engineering …, 2012 | 45 | 2012 |
| Exploring use of Ethernet for in-vehicle control applications: AFDX, TTEthernet, EtherCAT, and AVB R Cummings, K Richter, R Ernst, J Diemer, A Ghosal SAE International Journal of Passenger Cars-Electronic and Electrical …, 2012 | 42 | 2012 |
| Method for operating a multiprocessor computer system R Ernst, J Diemer US Patent 8,515,797, 2013 | 28 | 2013 |
| Efficient throughput-guarantees for latency-sensitive networks-on-chip J Diemer, R Ernst, M Kauschke 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 529-534, 2010 | 26 | 2010 |
| Improved formal worst-case timing analysis of weighted round robin scheduling for ethernet D Thiele, J Diemer, P Axer, R Ernst, J Seyler 2013 International Conference on Hardware/Software Codesign and System …, 2013 | 25 | 2013 |
| Exploring the worst-case timing of Ethernet AVB for industrial applications J Diemer, J Rox, R Ernst, F Chen, KT Kremer, K Richter IECON 2012-38th Annual Conference on IEEE Industrial Electronics Society …, 2012 | 22 | 2012 |
| Real-time communication analysis for networks with two-stage arbitration J Diemer, J Rox, M Negrean, S Stein, R Ernst Proceedings of the ninth ACM international conference on Embedded software …, 2011 | 22 | 2011 |
| FMEA-based analysis of a network-on-chip for mixed-critical systems EA Rambo, A Tschiene, J Diemer, L Ahrendts, R Ernst 2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 33-40, 2014 | 15 | 2014 |
| On the Convergence of the SymTA S Stein, J Diemer, M Ivers, S Schliecker, R Ernst s analysis. Technical report, Technische Universität Braunschweig …, 2008 | 12 | 2008 |
| Hardware and software support for mixed-criticality multicore systems G Farrall, C Stellwag, J Diemer, R Ernst Proc. of the Conference on Design, Automation and Test in Europe, WICERT …, 2013 | 11 | 2013 |
| Predictable architecture and performance analysis for general-purpose networks-on-chip JF Diemer Verlag Dr. Hut, 2016 | 9 | 2016 |
| Failure analysis of a network-on-chip for real-time mixed-critical systems EA Rambo, A Tschiene, J Diemer, L Ahrendts, R Ernst 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014 | 8 | 2014 |
| Cooperating on real-time capable ethernet architecture in vehicles D Thiele, R Ernst, J Diemer, K Richter ATZelektronik worldwide 8 (5), 40-44, 2013 | 6 | 2013 |
