| An academic risc-v silicon implementation based on open-source components J Abella, C Bulla, G Cabo, FJ Cazorla, A Cristal, M Doblas, R Figueras, ... 2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2020 | 22 | 2020 |
| HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem V Kostalabros, J Ribes-González, O Farràs, M Moretó, C Hernandez 2021 31st International Conference on Field-Programmable Logic and …, 2021 | 21 | 2021 |
| DVINO: A RISC-V vector processor implemented in 65nm technology G Cabo, G Candón, X Carril, M Doblas, M Domínguez, A González, ... 2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS), 1-6, 2022 | 8 | 2022 |
| Enabling hardware randomization across the cache hierarchy in Linux-Class processors M Doblas, IV Kostalabros, M Moreto Planas, C Hernández Luz Fourth Workshop on Computer Architecture Research with RISC-V (CARRV 2020 …, 2020 | 6 | 2020 |
| Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology M Doblas, G Candón, X Carril, M Domínguez, E Erra, A González, ... 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2023 | 3 | 2023 |
| A Security Model for Randomization-based Protected Caches J Ribes-González, O Farràs, C Hernández, V Kostalabros, M Moretó Cryptology ePrint Archive, 2022 | 2 | 2022 |
| Carrier Phase Recovery of 64 GBd Optical 16-QAM Using Extensive Parallelization on an FPGA V Kostalampros, KMG Lentaris, D Soudris, C Spatharakis, N Argyris, ... 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 2 | 2018 |
| A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator V Kostalabros, J Ribes-González, O Farràs, M Moretó, C Hernandez International Symposium on Applied Reconfigurable Computing, 282-295, 2024 | | 2024 |
| Leveraging HLS to Design a Versatile & High-Performance Classic McEliece Accelerator IV Kostalabros, J Ribes, X Carril, O Farras, C Hernandez, M Moreto ACM Transactions on Embedded Computing Systems, 2024 | | 2024 |
| Hardware Acceleration for High-Volume Operations of CRYSTALS-Kyber and CRYSTALS-Dilithium X Carril, C Kardaris, J Ribes-González, O Farràs, C Hernandez, ... ACM Transactions on Reconfigurable Technology and Systems, 2024 | | 2024 |
| Real-Time Carrier Phase Recovery for 16-QAM Utilizing the Nonlinear Least Squares Algorithm V Kostalampros, C Spatharakis, K Maragos, G Lentaris, N Argyris, S Dris, ... 2018 Optical Fiber Communications Conference and Exposition (OFC), 1-3, 2018 | | 2018 |
| Lagarto: First Silicon RISC-V Academic Processor Developed in Spain J Abella, G Cabo, FJ Cazorla, A Cristal, R Figueras, A González, ... | | |
Carles HernándezUniversitat Politècnica de València在 upv.es 的电子邮件经过验证
