关注
Amitoj Singh
Amitoj Singh
RF System Design Engineer, Apple Inc
在 apple.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
A 37-40 GHz phased array front-end with dual polarization for 5G MIMO beamforming applications
AG Roy, O Inac, A Singh, T Mukatel, O Brandelstein, TW Brown, ...
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 251-254, 2019
682019
A 16-channel, 28/39GHz dual-polarized 5G FR2 phased-array transceiver IC with a quad-stream IF transceiver supporting non-contiguous carrier aggregation up to 1.6 GHz BW
A Verma, V Bhagavatula, A Singh, W Wu, H Nagarajan, PK Lau, X Yu, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022
422022
A 17.3-mW 0.46-mm2 26/28/39GHz phased-array receiver front-end with an I/Q-current-shared active phase shifter for 5G user equipment
X Yu, A Jain, A Singh, O Elsayed, C Kuo, H Nagarajan, D Yoon, ...
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 107-110, 2021
152021
Method and circuit for power consumption reduction in active phase shifters
A Jain, A Singh, X Yu, T Chang, SCI Lu, SW Son
US Patent 11,183,973, 2021
22021
Self-biasing shunt switch with bootstrapping
A Singh, T Chang, SCI Lu
US Patent 12,028,058, 2024
2024
Band switching balun
A Singh, A Jain, X Yu, T Chang, SCI Lu, SW Son
US Patent 11,799,504, 2023
2023
Self-biasing shunt switch with bootstrapping
A Singh, T Chang, SCI Lu
US Patent 11,641,202, 2023
2023
Method and circuit for power consumption reduction in active phase shifters
A Jain, A Singh, X Yu, T Chang, SCI Lu, SW Son
US Patent App. 17/532,340, 2022
2022
Band switching balun
A Singh, A Jain, X Yu, T Chang, SCI Lu, SW Son
US Patent 11,245,426, 2022
2022
Design of Logical Effort for Worst Case Power Estimation in a CMOS Circuit in 90 nm Technology
S Maheshwari, A Singh, A Gupta
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