| Statistical timing analysis: From basic principles to state of the art D Blaauw, K Chopra, A Srivastava, L Scheffer IEEE transactions on computer-aided design of integrated circuits and …, 2008 | 506 | 2008 |
| Statistical analysis and optimization for VLSI: timing and power A Srivastava, D Sylvester, D Blaauw Springer Science & Business Media, 2006 | 387 | 2006 |
| Statistical analysis of subthreshold leakage current for VLSI circuits R Rao, A Srivastava, D Blaauw, D Sylvester IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (2), 131-139, 2004 | 237 | 2004 |
| Pushing ASIC performance in a power envelope L Stok, R Puri, S Bhattacharya, J Cohn, D Sylvester, A Srivastava, ... Closing the Power Gap Between ASIC & Custom, 323-356, 2007 | 217* | 2007 |
| Pushing ASIC performance in a power envelope R Puri, L Stok, J Cohn, D Kung, D Pan, D Sylvester, A Srivastava, ... Proceedings of the 40th annual Design Automation Conference, 788-793, 2003 | 217 | 2003 |
| Modeling and analysis of leakage power considering within-die process variations A Srivastava, R Bai, D Blaauw, D Sylvester Proceedings of the International Symposium on Low Power Electronics and …, 2002 | 167 | 2002 |
| Statistical optimization of leakage power considering process variations using dual-Vth and sizing A Srivastava, D Sylvester, D Blaauw Proceedings of the 41st annual Design Automation Conference, 773-778, 2004 | 166 | 2004 |
| Statistical estimation of leakage current considering inter-and intra-die process variation R Rao, A Srivastava, D Blaauw, D Sylvester Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 159 | 2003 |
| Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment A Srivastava, D Sylvester, D Blaauw Proceedings of the 41st annual Design Automation Conference, 783-787, 2004 | 132 | 2004 |
| Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance A Srivastava, S Shah, K Agarwal, D Sylvester, D Blaauw, S Director Proceedings of the 42nd annual Design Automation Conference, 535-540, 2005 | 130 | 2005 |
| Minimizing total power by simultaneous V/sub dd//V/sub th/assignment A Srivastava, D Sylvester IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004 | 118* | 2004 |
| Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation K Chopra, S Shah, A Srivastava, D Blaauw, D Sylvester ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005 | 99 | 2005 |
| A new algorithm for improved VDD assignment in low power dual VDD systems SH Kulkarni, AN Srivastava, D Sylvester Proceedings of the 2004 international symposium on Low power electronics and …, 2004 | 89 | 2004 |
| Discrete Vt assignment and gate sizing using a self-snapping continuous formulation S Shah, A Srivastava, D Sharma, D Sylvester, D Blaauw, V Zolotov ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005 | 65 | 2005 |
| Concurrent sizing, Vdd and Vth assignment for low-power design A Srivastava, D Sylvester, D Blaauw Proceedings of the conference on Design, automation and test in Europe …, 2004 | 40* | 2004 |
| Low-power-design space exploration considering process variation using robust optimization A Srivastava, T Kachru, D Sylvester IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007 | 31 | 2007 |
| A novel approach to perform gate-level yield analysis and optimization considering correlated variations in power and performance A Srivastava, K Chopra, S Shah, D Sylvester, D Blaauw IEEE transactions on computer-aided design of integrated circuits and …, 2008 | 29 | 2008 |
| Computer-aided design for low-power robust computing in nanoscale CMOS D Sylvester, A Srivastava Proceedings of the IEEE 95 (3), 507-529, 2007 | 23 | 2007 |
| An implementation of a 32-bit ARM processor using dual power supplies and dual threshold voltages R Bai, S Kulkarni, W Kwong, A Srivastava, D Sylvester, D Blaauw IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings., 149-154, 2003 | 13 | 2003 |
| A general framework for probabilistic low-power design space exploration considering process variation A Srivastava, D Sylvester Proceedings of the 2004 IEEE/ACM International conference on Computer-aided …, 2004 | 10 | 2004 |
