关注
Dr Shailendra Singh
Dr Shailendra Singh
PSIT Kanpur
在 nitj.ac.in 的电子邮件经过验证
标题
引用次数
引用次数
年份
Design and analysis of a heterojunction vertical t-shaped tunnel field effect transistor
S Singh, B Raj
Journal of Electronic Materials 48, 6253-6260, 2019
952019
Modeling and simulation analysis of SiGe heterojunction double gate vertical t-shaped tunnel FET
S Singh, B Raj
Superlattices and Microstructures 142, 106496, 2020
762020
Two-dimensional analytical modeling of the surface potential and drain current of a double-gate vertical t-shaped tunnel field-effect transistor
S Singh, B Raj
Journal of Computational Electronics 19 (3), 1154-1163, 2020
692020
Design and analysis of dual source vertical tunnel field effect transistor for high performance
S Badgujjar, G Wadhwa, S Singh, B Raj
Transactions on Electrical and Electronic Materials 21, 74-82, 2020
652020
Analytical modeling and simulation analysis of T-shaped III-V heterojunction vertical T-FET
S Singh, B Raj
Superlattices and Microstructures 147, 106717, 2020
512020
An analytical modeling for dual source vertical tunnel field effect transistor
SS Soniya, G Wadhwa, B Raj
International Journal of Recent Technology and Engineering (IJRTE) 8 (2 …, 2019
362019
Removal of lead ions from aqueous solutions by different types of industrial waste materials: equilibrium and kinetic studies
A Bhatnagar, AK Jain, AK Minocha, S Singh
Separation science and technology 41 (9), 1881-1892, 2006
362006
Investigation of N + SiGe juntionless vertical TFET with gate stack for gas sensing application
et al. Shailendra Singh
Applied Physics A, 2021
352021
Vertical tunnel-fet analysis for excessive low power digital applications
S Singh, B Raj
2018 First international conference on secure cyber computing and …, 2018
322018
Detection of biomolecules using charge-plasma based gate underlap dielectric modulated dopingless TFET
SK Verma, S Singh, G Wadhwa, B Raj
Transactions on Electrical and Electronic Materials 21 (5), 528-535, 2020
302020
Study of parametric variations on hetero-junction vertical t-shape TFET for suppressing ambipolar conduction
S Singh, B Raj
NISCAIR-CSIR, India, 2020
272020
Analytical and compact modeling analysis of a SiGe hetero-material vertical L-shaped TFET
S Singh, B Raj
Silicon 14 (5), 2135-2145, 2022
232022
Analysis of ONOFIC technique using SiGe heterojunction double gate vertical TFET for low power applications
S Singh, B Raj
Silicon 13 (7), 2115-2124, 2021
212021
Analytical modelling and simulation of Si-Ge hetero-junction dual material gate vertical T-shaped tunnel FET
S Singh, B Raj
Silicon 13 (4), 1139-1150, 2021
202021
Design and investigation of SiGe heterojunction based charge plasma vertical TFET for biosensing application
S Singh, AKS Chauhan, G Joshi, J Singh
Silicon 14 (11), 6193-6204, 2022
152022
An improved analytical modeling and simulation of gate stacked linearly graded work function vertical TFET
S Singh, S Yadav, SK Bhalla
Silicon 14 (9), 4647-4660, 2022
142022
Design and Analysis of ION and Ambipolar Current for Vertical TFET
S Singh, B Raj
Manufacturing Engineering: Select Proceedings of CPIE 2019, 541-559, 2020
132020
Investigation of N+ SiGe gate stacked V-TFET based on Dopingless charge plasma for gas sensing application
S Singh, A Verma, J Singh, G Wadhwa
Silicon 14 (11), 6205-6218, 2022
122022
Design and integration of vertical TFET and memristor for better realization of logical functions
J Singh, S Singh, N Paras
Silicon 15 (2), 783-792, 2023
102023
Design and analysis of triple metal vertical TFET gate stacked with N-Type SiGe delta-doped layer
S Gupta, S Wairya, S Singh
Silicon 14 (8), 4217-4225, 2022
102022
系统目前无法执行此操作,请稍后再试。
文章 1–20