A Flexible Event-Driven Digital Filter with Frequency Response Independent of Input Sample Rate C Vezyrtzis, W Jiang, SM Nowick, Y Tsividis IEEE Journal of Solid-State Circuits (JSSC), 49 (10), 2292-2304, 2014 | 29 | 2014 |
An Asynchronous NoC Router in a 14nm FinFET Library: Comparison to an Industrial Synchronous Counterpart W Jiang, D Bertozzi, G Miorandi, SM Nowick, W Burleson, G Sadowski Proceedings of the ACM/IEEE Design, Automation and Test in Europe (DATE …, 2017 | 24 | 2017 |
A Lightweight Early Arbitration Method for Low-Latency Asynchronous 2D-Mesh NoC’s W Jiang, K Bhardwaj, G Lacourba, SM Nowick Proceedings of the ACM/IEEE Design Automation Conference (DAC), 1-6, 2015 | 21 | 2015 |
Practical Completion Detection for 2-of-N Delay-Insensitive Codes M Cannizzaro, W Jiang, SM Nowick International Workshop on Logic and Synthesis (IWLS), 2010 | 16 | 2010 |
Practical Completion Detection for 2-of-N Delay-Insensitive Codes M Cannizzaro, W Jiang, SM Nowick Proceedings of the IEEE International Conference on Computer Design (ICCD …, 2010 | 16 | 2010 |
Cost-effective and flexible asynchronous interconnect technology for GALS systems D Bertozzi, G Miorandi, A Ghiribaldi, W Burleson, G Sadowski, ... IEEE Micro 41 (1), 69-81, 2020 | 13 | 2020 |
A Flexible Clockless Digital Filter C Vezyrtzis, W Jiang, SM Nowick, Y Tsividis Proceedings of the IEEE European Solid-State Circuit Conference (ESSCIRC), 65-68, 2013 | 13 | 2013 |
Achieving lightweight multicast in asynchronous NoCs using a continuous-time multi-way read buffer K Bhardwaj, W Jiang, SM Nowick Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on …, 2017 | 12 | 2017 |
A Low-Latency Asynchronous Interconnection Network with Early Arbitration Resolution G Faldamis, W Jiang, G Gil, SM Nowick Proceedings of the ACM/IEEE Asia and South Pacific Design Automation …, 2014 | 8 | 2014 |
A High-Throughput Asynchronous Multi-Resource Arbiter Using a Pipelined Assignment Approach W Jiang, SM Nowick Proceedings of the IEEE International Symposium on Asynchronous Circuits and …, 2017 | 3 | 2017 |
Self-timed router with virtual channel control W Jiang, G Sadowski US Patent 10,075,383, 2018 | 1 | 2018 |
Design and performance optimization of asynchronous networks-on-chip W Jiang Columbia University, 2018 | 1 | 2018 |
Self-timed router with virtual channel control W Jiang, G Sadowski Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States), 2018 | | 2018 |