| RF & linearity distortion sensitivity analysis of DMG-DG-Ge pocket TFET with hetero dielectric KN Priyadarshani, S Singh, A Naugarhiya Microelectronics Journal 108, 104973, 2021 | 33 | 2021 |
| Vertically Extended Drain Double Gate Si1−xGex Source Tunnel FET : Proposal & Investigation For Optimized Device Performance A Raj, S Singh, KN Priyadarshani, R Arya, A Naugarhiya Silicon 13, 2589-2604, 2021 | 23 | 2021 |
| Dual metal double gate Ge-pocket TFET (DMG-DG-Ge-Pocket TFET) with hetero dielectric: DC & analog performance projections KN Priyadarshani, S Singh, A Naugarhiya Silicon, 1-12, 2021 | 21 | 2021 |
| Application of workfunction engineering in vertical superjunction devices P Nautiyal, A Naugarhiya, S Verma Superlattices and Microstructures 109, 927-935, 2017 | 17 | 2017 |
| High permittivity material selection for design of optimum Hk VDMOS A Naugarhiya, PN Kondekar Superlattices and Microstructures 83, 310-321, 2015 | 16 | 2015 |
| VERILOG based simulation of ASK, FSK, PSK, QPSK digital modulation techniques A Sharma, S Majumdar, A Naugarhiya, B Acharya, S Majumder, S Verma 2017 International Conference on I-SMAC (IoT in Social, Mobile, Analytics …, 2017 | 15 | 2017 |
| Optimization of Si-doped Hf ferroelectric material-based negative capacitance junctionless TFET: Impact of temperature on RF/linearity performance S Singh, S Singh, A Naugarhiya International Journal of Modern Physics B 34 (27), 2050242, 2020 | 11 | 2020 |
| Trench IGBT with stepped doped collector for low energy loss M Vaidya, A Naugarhiya, S Verma Semiconductor Science and Technology 35 (2), 025015, 2020 | 11 | 2020 |
| Novel strained superjunction VDMOS A Naugarhiya, S Dubey, PN Kondekar Superlattices and Microstructures 85, 461-468, 2015 | 11 | 2015 |
| Analysis of total ionizing dose response of optimized fin geometry workfunction modulated SOI-FinFET A Ray, A Naugarhiya, GP Mishra Microelectronics Reliability 134, 114549, 2022 | 10 | 2022 |
| An insulated gate bipolar transistor with three-layer poly gate for improved figure of merit N Gupta, S Singh, A Naugarhiya Journal of Materials Science: Materials in Electronics 31 (18), 15513-15521, 2020 | 10 | 2020 |
| Strained superjunction U-MOSFET with insulating layer between alternate pillars P Nautiyal, A Naugarhiya, S Verma Materials Research Express 6 (4), 046424, 2019 | 10 | 2019 |
| Incorporation of hafnium and platinum metal in vertical power mosfets O Parmar, A Naugarhiya Journal of Computational Electronics 17, 1241-1248, 2018 | 10 | 2018 |
| RF based wireless data transmission between two FPGAs J Rusia, A Naugarhiya, S Majumder, S Majumdar, B Acharya, S Verma 2016 international conference on ICT in business industry & government …, 2016 | 10 | 2016 |
| SEGR hardened superjunction VDMOS with high-K gate dielectrics S Ranjan, S Majumder, A Naugarhiya 2020 International Conference on Power Electronics & IoT Applications in …, 2020 | 9 | 2020 |
| 1.4 kv planar gate superjunction igbt with stepped doping profile in drift and collector region N Gupta, A Naugarhiya Silicon 13, 697-706, 2021 | 8 | 2021 |
| Lateral variation-doped insulated gate bipolar transistor for low on-state voltage with low loss M Vaidya, A Naugarhiya, S Verma, GP Mishra IEEE Electron Device Letters 41 (6), 888-891, 2020 | 8 | 2020 |
| Remote temperature & humidity sensing through ASK modulation technique J Rusia, A Naugarhiya, S Majumder, S Majumdar, B Acharya, S Verma 2016 International Conference on ICT in Business Industry & Government …, 2016 | 8 | 2016 |
| Analysis of Single Event Gate Rupture in Trench Gate SJ-VDMOS with SiO2-Si3N4 Dielectric Stacking R Verma, S Ranjan, A Naugarhiya 2021 IEEE Region 10 Symposium (TENSYMP), 1-6, 2021 | 7 | 2021 |
| Analytical model for 4H-SiC superjunction drift layer with anisotropic properties for ultrahigh-voltage applications A Naugarhiya, P Wakhradkar, PN Kondekar, GC Patil, RM Patrikar Journal of Computational Electronics 16, 190-201, 2017 | 7 | 2017 |
Shrish VermaNational Institute of Technology Raipur,在 nitrr.ac.in 的电子邮件经过验证
