| Overview and status of metal S/D Schottky-barrier MOSFET technology JM Larson, JP Snyder IEEE Transactions on Electron Devices 53 (5), 1048-1058, 2006 | 604 | 2006 |
| Sub-40 nm PtSi Schottky source/drain metal–oxide–semiconductor field-effect transistors C Wang, JP Snyder, JR Tucker Applied Physics Letters 74 (8), 1174-1176, 1999 | 234 | 1999 |
| Experimental investigation of a PtSi source and drain field emission transistor JP Snyder, CR Helms, Y Nishi Applied Physics Letters 67 (10), 1420-1422, 1995 | 141 | 1995 |
| Dynamic schottky barrier MOSFET device and method of manufacture J Snyder, J Larson US Patent App. 10/970,688, 2005 | 138 | 2005 |
| Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts JP Snyder US Patent 6,303,479, 2001 | 130 | 2001 |
| High-speed Schottky-barrier pMOSFET with f/sub T/= 280 GHz M Fritze, CL Chen, S Calawa, D Yost, B Wheeler, P Wyatt, CL Keast, ... IEEE Electron Device Letters 25 (4), 220-222, 2004 | 114 | 2004 |
| Correlation between inversion layer mobility and surface roughness measured by AFM T Yamanaka, SJ Fang, HC Lin, JP Snyder, CR Helms IEEE Electron Device Letters 17 (4), 178-180, 1996 | 111 | 1996 |
| Short-channel schottky-barrier MOSFET device and manufacturing method JP Snyder US Patent 6,744,103, 2004 | 95 | 2004 |
| Schottky barrier integrated circuit J Snyder, J Larson US Patent App. 10/944,627, 2005 | 80 | 2005 |
| Suppression of leakage current in Schottky barrier metal–oxide–semiconductor field-effect transistors LE Calvet, H Luebben, MA Reed, C Wang, JP Snyder, JR Tucker Journal of applied physics 91 (2), 757-759, 2002 | 78 | 2002 |
| Schottky-barrier mosfet manufacturing method using isotropic etch process JP Snyder, JM Larson US Patent 7,291,524, 2007 | 70 | 2007 |
| Fabrication method for a device for regulating flow of electric current with high dielectric constant gate insulating layer and source/drain forming schottky contact or … J Snyder, J Larson US Patent App. 09/928,124, 2003 | 69 | 2003 |
| Schottky barrier CMOS device and method J Snyder, J Larson US Patent App. 10/440,472, 2003 | 59 | 2003 |
| Subthreshold and scaling of PtSi Schottky barrier MOSFETs LE Calvet, H Luebben, MA Reed, C Wang, JP Snyder, JR Tucker Superlattices and Microstructures 28 (5-6), 501-506, 2000 | 53 | 2000 |
| Schottky barrier CMOS fabrication method JP Snyder, JM Larson US Patent 6,974,737, 2005 | 51 | 2005 |
| IEEE Trans. Electron Devices JM Larson, JP Snyder IEEE Trans. Electron Devices 53 (5), 1048-1058, 2006 | 37 | 2006 |
| The effect of source/drain processing on the reverse short channel effect of deep sub-micron bulk and SOI NMOSFETs SW Crowder, PM Rousseau, JP Snyder, JA Scott, PB Griffin, JD Plummer Proceedings of International Electron Devices Meeting, 427-430, 1995 | 37 | 1995 |
| On the physical behavior of cryogenic IV and III–V Schottky barrier MOSFET devices M Schwarz, LE Calvet, JP Snyder, T Krauss, U Schwalke, A Kloes IEEE Transactions on Electron Devices 64 (9), 3808-3815, 2017 | 36 | 2017 |
| Short-channel schottky-barrier MOSFET device JP Snyder US Patent 6,495,882, 2002 | 34 | 2002 |
| Transistor having high dielectric constant gate insulating layer and source and drain forming Schottky contact with substrate JP Snyder, JM Larson US Patent 6,949,787, 2005 | 32 | 2005 |
Laurie E. CalvetLaboratoire de Physique des Interfaces et des Couches Minces (LPICM), CNRS-Ecole Polytechnique在 cnrs.fr 的电子邮件经过验证
