| A two-cycle lock-in time ADPLL design based on a frequency estimation algorithm CT Wu, WC Shen, W Wang, AY Wu IEEE Transactions on Circuits and Systems II: Express Briefs 57 (6), 430-434, 2010 | 67 | 2010 |
| A 42 to 47-GHz, 8-bit I/Q digital-to-RF converter with 21-dBm Psat and 16% PAE in 45-nm SOI CMOS A Agah, W Wang, P Asbeck, L Larson, J Buckwalter 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 249-252, 2013 | 39 | 2013 |
| A scalable DCO design for portable ADPLL designs CT Wu, W Wang, IC Wey, AY Wu 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 5449-5452, 2005 | 27 | 2005 |
| A 10-Gb/s, 107-mW double-edge pulsewidth modulation transceiver W Wang, JF Buckwalter IEEE Transactions on Circuits and Systems I: Regular Papers 61 (4), 1068-1080, 2013 | 24 | 2013 |
| A high speed scalable shift-register based on-chip serial communication design for SoC applications IC Wey, YG Chen, CT Wu, W Wang, AY Wu IEEE Ph.D. Research in Microelectronics and Electronics, 2005 | 13* | 2005 |
| Source coding and preemphasis for double-edged pulsewidth modulation serial communication W Wang, JF Buckwalter IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 555-566, 2015 | 5 | 2015 |
| Double-edge pulsewidth modulation for multidrop backplanes W Wang, JF Buckwalter 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium …, 2011 | 3 | 2011 |
| Interconnect channel characteristics favoring double-edge pulsewidth modulation W Wang, JF Buckwalter 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging …, 2011 | 3 | 2011 |
| A portable all-digital pulsewidth control loop for SOC applications W Wang, IC Wey, CT Wu, AY Wu 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-3168, 2006 | 2 | 2006 |
| A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time CT Wu, W Wang, IC Wey, AY Wu 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-4085, 2006 | 2 | 2006 |
| Design Implementation and Channel Equalization of Double-Edge Pulsewidth Modulation Signaling W Wang UC San Diego, 2014 | | 2014 |
