Quantitative evaluation of soft error injection techniques for robust system design H Cho, S Mirkhani, CY Cher, JA Abraham, S Mitra Proceedings of the 50th Annual Design Automation Conference, 1-10, 2013 | 300 | 2013 |
CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining hardware and software techniques to tolerate soft errors in processor cores E Cheng, S Mirkhani, LG Szafaryn, CY Cher, H Cho, K Skadron, MR Stan, ... Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 100 | 2016 |
Efficient soft error vulnerability estimation of complex designs S Mirkhani, S Mitra, CY Cher, J Abraham 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 103-108, 2015 | 31 | 2015 |
Tolerating soft errors in processor cores using clear (cross-layer exploration for architecting resilience) E Cheng, S Mirkhani, LG Szafaryn, CY Cher, H Cho, K Skadron, MR Stan, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 27 | 2017 |
Systems and methods for accelerating data operations by utilizing dataflow subgraph templates B Samynathan, K Chapman, M Nik, B Robatmili, S Mirkhani, M Lavasani, ... US Patent App. 16/898,048, 2020 | 25 | 2020 |
Hierarchical fault simulation using behavioral and gate level hardware models S Mirkhani, M Lavasani, Z Navabi Proceedings of the 11th Asian Test Symposium, 2002.(ATS'02)., 374-379, 2002 | 24 | 2002 |
Eagle: A regression model for fault coverage estimation using a simulation based metric S Mirkhani, JA Abraham 2014 International Test Conference, 1-10, 2014 | 17 | 2014 |
Rethinking error injection for effective resilience S Mirkhani, H Cho, S Mitra, JA Abraham 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 390-393, 2014 | 17 | 2014 |
Fast evaluation of test vector sets using a simulation-based statistical metric S Mirkhani, JA Abraham 2014 IEEE 32nd VLSI Test Symposium (VTS), 1-6, 2014 | 15 | 2014 |
In-depth soft error vulnerability analysis using synthetic benchmarks S Mirkhani, B Samynathan, JA Abraham 2015 IEEE 33rd VLSI Test Symposium (VTS), 1-6, 2015 | 13 | 2015 |
Using RT level component descriptions for single stuck-at hierarchical fault simulation Z Navabi, S Mirkhani, M Lavasani, F Lombardi Journal of Electronic Testing 20, 575-589, 2004 | 13 | 2004 |
FALCON: Rapid statistical fault coverage estimation for complex designs S Mirkhani, JA Abraham, T Vo, H Jun, B Eklow 2012 IEEE International Test Conference, 1-10, 2012 | 12 | 2012 |
Computational storage for big data analytics K Chapman, M Nik, B Robatmili, S Mirkhani, M Lavasani Proceedings of 10th International Workshop on Accelerating Analytics and …, 2019 | 9 | 2019 |
Enhancing fault simulation performance by dynamic fault clustering S Mirkhani, Z Navabi 14th Asian Test Symposium (ATS'05), 278-283, 2005 | 8 | 2005 |
System level design languages S Mirkhani, Z Navabi The VLSI Handbook, Chapter 86, 2006 | 7 | 2006 |
SPC-FC: A new method for fault simulation implemented in VHDl M Zolfy, S Mirkhani, Z Navabi Proc. of NATW'01, 17-21, 2001 | 7 | 2001 |
Cross-layer resilience in low-voltage digital systems: key insights E Cheng, J Abraham, P Bose, A Buyuktosunoglu, K Campbell, D Chen, ... 2017 IEEE International Conference on Computer Design (ICCD), 593-596, 2017 | 6 | 2017 |
Computational Storage For Big Data Analytics. B Samynathan, K Chapman, M Nik, B Robatmili, S Mirkhani, M Lavasani ADMS@ VLDB, 55-63, 2019 | 5 | 2019 |
The VLSI Handbook, Chapter 86 S Mirkhani, Z Navabi CRC Press, 2nd Edition, Appears in Dec, 2006 | 5 | 2006 |
Adaptation of an event-driven simulation environment to sequentially propagated concurrent fault simulation M Zolfy, S Mirkhani, Z Navabi Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001 | 5 | 2001 |