| The spinnaker project SB Furber, F Galluppi, S Temple, LA Plana Proceedings of the IEEE 102 (5), 652-665, 2014 | 1384 | 2014 |
| Overview of the SpiNNaker system architecture SB Furber, DR Lester, LA Plana, JD Garside, E Painkras, S Temple, ... IEEE transactions on computers 62 (12), 2454-2467, 2012 | 786 | 2012 |
| SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation E Painkras, LA Plana, J Garside, S Temple, F Galluppi, C Patterson, ... IEEE Journal of Solid-State Circuits 48 (8), 1943-1953, 2013 | 518 | 2013 |
| SpiNNaker: mapping neural networks onto a massively-parallel chip multiprocessor MM Khan, DR Lester, LA Plana, A Rast, X Jin, E Painkras, SB Furber 2008 IEEE International Joint Conference on Neural Networks (IEEE World …, 2008 | 406 | 2008 |
| A GALS infrastructure for a massively parallel multiprocessor LA Plana, SB Furber, S Temple, M Khan, Y Shi, J Wu, S Yang IEEE Design & Test of Computers 24 (5), 454-463, 2007 | 194 | 2007 |
| Minimalist: An environment for the synthesis, verification and testability of burst-mode asynchronous machines RM Fuhrer, SM Nowick, M Theobald, NK Jha, B Lin, L Plana | 142 | 1999 |
| Modeling spiking neural networks on SpiNNaker X Jin, M Lujan, LA Plana, S Davies, S Temple, SB Furber Computing in science & engineering 12 (5), 91-97, 2010 | 126 | 2010 |
| A hierachical configuration system for a massively parallel neural hardware platform F Galluppi, S Davies, A Rast, T Sharp, LA Plana, S Furber Proceedings of the 9th conference on Computing Frontiers, 183-192, 2012 | 95 | 2012 |
| sPyNNaker: a software package for running PyNN simulations on SpiNNaker O Rhodes, PA Bogdan, C Brenninkmeijer, S Davidson, D Fellows, A Gait, ... Frontiers in neuroscience 12, 816, 2018 | 92 | 2018 |
| Spinnaker: A multi-core system-on-chip for massively-parallel neural net simulation E Painkras, LA Plana, J Garside, S Temple, S Davidson, J Pepper, ... Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-4, 2012 | 84 | 2012 |
| An investigation into the security of self-timed circuits ZC Yu, SB Furber, LA Plana Ninth International Symposium on Asynchronous Circuits and Systems, 2003 …, 2003 | 82 | 2003 |
| Understanding the interconnection network of SpiNNaker J Navaridas, M Luján, J Miguel-Alonso, LA Plana, S Furber Proceedings of the 23rd international conference on Supercomputing, 286-295, 2009 | 81 | 2009 |
| SPA-a synthesisable amulet core for smartcard applications LA Plana, PA Riocreux, WJ Bainbridge, A Bardsley, JD Garside, S Temple Proceedings Eighth International Symposium on Asynchronous Circuits and …, 2002 | 67 | 2002 |
| A framework for plasticity implementation on the SpiNNaker neural architecture F Galluppi, X Lagorce, E Stromatias, M Pfeiffer, LA Plana, SB Furber, ... Frontiers in neuroscience 8, 429, 2015 | 66 | 2015 |
| Event-based neural computing on an autonomous mobile platform F Galluppi, C Denk, MC Meiner, TC Stewart, LA Plana, C Eliasmith, ... 2014 IEEE international conference on robotics and automation (ICRA), 2862-2867, 2014 | 63 | 2014 |
| SpiNNaker: design and implementation of a GALS multicore system-on-chip LA Plana, D Clark, S Davidson, S Furber, J Garside, E Painkras, J Pepper, ... ACM Journal on Emerging Technologies in Computing Systems (JETC) 7 (4), 1-18, 2011 | 60 | 2011 |
| Scalable event-driven native parallel processing: the SpiNNaker neuromimetic system AD Rast, X Jin, F Galluppi, LA Plana, C Patterson, S Furber Proceedings of the 7th ACM international conference on Computing frontiers …, 2010 | 56 | 2010 |
| Real-time cortical simulation on neuromorphic hardware O Rhodes, L Peres, AGD Rowley, A Gait, LA Plana, C Brenninkmeijer, ... Philosophical Transactions of the Royal Society A 378 (2164), 20190160, 2020 | 55 | 2020 |
| Real-time interface board for closed-loop robotic tasks on the SpiNNaker neural computing system C Denk, F Llobet-Blandino, F Galluppi, LA Plana, S Furber, J Conradt Artificial Neural Networks and Machine Learning–ICANN 2013: 23rd …, 2013 | 49 | 2013 |
| Fault tolerant delay insensitive inter-chip communication Y Shi, SB Furber, J Garside, LA Plana 2009 15th IEEE Symposium on Asynchronous Circuits and Systems, 77-84, 2009 | 46 | 2009 |
Steve FurberProfessor Emeritus, Department of Computer Science, The University of Manchester, UK在 manchester.ac.uk 的电子邮件经过验证
