| Progress of large‐scale synthesis and electronic device application of two‐dimensional transition metal dichalcogenides X Song, Z Guo, Q Zhang, P Zhou, W Bao, DW Zhang Small 13 (35), 1700098, 2017 | 74 | 2017 |
| Transfer learning with Bayesian optimization-aided sampling for efficient AMS circuit modeling J Liu, M Hassanpourghadi, Q Zhang, S Su, MSW Chen Proceedings of the 39th International Conference on Computer-Aided Design …, 2020 | 26 | 2020 |
| A Fractional-N Digital MDLL With Background Two-Point DTC Calibration Q Zhang, S Su, CR Ho, MSW Chen IEEE Journal of Solid-State Circuits 57 (1), 80-89, 2021 | 16 | 2021 |
| From specification to silicon: Towards analog/mixed-signal design automation using surrogate NN models with transfer learning J Liu, S Su, M Madhusudan, M Hassanpourghadi, S Saunders, Q Zhang, ... 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD '21), 1-9, 2021 | 15 | 2021 |
| 29.4 A Fractional-N Digital MDLL with Background Two-Point DTC Calibration Achieving -60dBc Fractional Spur Q Zhang, S Su, CR Ho, MSW Chen 2021 IEEE International Solid-State Circuits Conference (ISSCC '21) 64, 410-412, 2021 | 15 | 2021 |
| Large capacitance and fast polarization response of thin electrolyte dielectrics by spin coating for two-dimensional MoS2 devices W Zan, Q Zhang, H Xu, F Liao, Z Guo, J Deng, J Wan, H Zhu, L Chen, ... Nano Research 11 (7), 3739-3745, 2018 | 12 | 2018 |
| Circuit connectivity inspired neural network for analog mixed-signal functional modeling M Hassanpourghadi, S Su, RA Rasul, J Liu, Q Zhang, MSW Chen 2021 58th ACM/IEEE Design Automation Conference (DAC '21), 505-510, 2021 | 11 | 2021 |
| CEPA: CNN-based Early Performance Assertion Scheme for Analog and Mixed-Signal Circuit Simulation Q Zhang, S Su, J Liu, MSW Chen IEEE/ACM International Conference on Computer-Aided Design (ICCAD ’20), 2020 | 8 | 2020 |
| Fractional-N Digital MDLL With Injection-Error Scrambling and Calibration Q Zhang, HC Cheng, S Su, MSW Chen IEEE Journal of Solid-State Circuits, 2023 | 3 | 2023 |
| TAFA: Design Automation of Analog Mixed-Signal FIR Filters Using Time Approximation Architecture S Su, Q Zhang, J Liu, M Hassanpourghadi, R Rasul, MSW Chen 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC '22), 2021 | 3 | 2021 |
| Automated Analog Mixed Signal IP Generator for CMOS Technologies M Hassanpourghadi, Q Zhang, P Sharma, J Nam, S Su, S Chowdhury, ... Government Microcircuit Applications & Critical Technology (GOMACTech '19), 2019 | 3 | 2019 |
| A memristor-based analog accelerator for solving quadratic programming problems HC Cheng, S Su, M Palaria, Q Zhang, C Yang, S Hossain, R Bena, ... 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023 | 2 | 2023 |
| Analog/Mixed-Signal Circuit Synthesis Enabled by the Advancements of Circuit Architectures and Machine Learning Algorithms S Su, Q Zhang, M Hassanpourghadi, J Liu, RA Rasul, MSW Chen 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC '22), 2021 | 2 | 2021 |
| Analog Kalman Filter with Integration and Digitization via a Shared Thyristor-Based VCO for Sensor Fusion in 65 nm CMOS M Palaria, S Su, HC Cheng, RA Rasul, Q Zhang, S Mahapatra, CF Law, ... ESSCIRC 2023-IEEE 49th European Solid State Circuits Conference (ESSCIRC …, 2023 | 1 | 2023 |
| A 2GS/s 8.5-Bit Time-Based ADC using a Segmented Stochastic Flash TDC S Su*, Q Zhang*, MSW Chen 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023 | 1 | 2023 |
| 14.1 A Fractional-N Digital MDLL with Injection-Error Scrambling and Background Third-Order DTC Delay Equalizer Achieving −67dBc Fractional Spur Q Zhang, HC Cheng, S Su, MSW Chen 2023 IEEE International Solid-State Circuits Conference (ISSCC), 226-228, 2023 | 1 | 2023 |
| Boolean satisfiability circuit accelerator T Levi, W Wu, S Gupta, B Chen, Z Liu, D Meng, S Su, Q Zhang, SW Chen US Patent App. 18/475,697, 2024 | | 2024 |
| A Novel Multi-Objective Optimization Framework for Analog Circuit Customization M Zhu, M Hassanpourghadi, Q Zhang, MSW Chen, AFJ Levi, S Gupta 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2024 | | 2024 |
| A cost-efficient fully synthesizable stochastic time-to-digital converter design based on integral nonlinearity scrambling Q Zhang*, S Su*, MSW Chen Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC '22 …, 2022 | | 2022 |
| ISSCC 2021/SESSION 29/DIGITAL CIRCUITS FOR COMPUTING, CLOCKING AND POWER MANAGEMENT/29.4 Q Zhang, S Su, CR Ho, MSW Chen | | |
Shiyu SuAssistant Professor, Electrical and Computer Engineering, University of Waterloo在 uwaterloo.ca 的电子邮件经过验证
