| System-level performance metrics for multiprogram workloads S Eyerman, L Eeckhout IEEE micro 28 (3), 42-53, 2008 | 529 | 2008 |
| An evaluation of high-level mechanistic core models TE Carlson, W Heirman, S Eyerman, I Hur, L Eeckhout ACM Transactions on Architecture and Code Optimization (TACO) 11 (3), 1-25, 2014 | 387 | 2014 |
| A performance counter architecture for computing accurate CPI components S Eyerman, L Eeckhout, T Karkhanis, JE Smith ACM SIGPLAN Notices 41 (11), 175-184, 2006 | 255 | 2006 |
| A mechanistic performance model for superscalar out-of-order processors S Eyerman, L Eeckhout, T Karkhanis, JE Smith ACM Transactions on Computer Systems (TOCS) 27 (2), 1-37, 2009 | 241 | 2009 |
| Modeling critical sections in Amdahl's law and its implications for multicore design S Eyerman, L Eeckhout Proceedings of the 37th annual international symposium on Computer …, 2010 | 194 | 2010 |
| Interval simulation: Raising the level of abstraction in architectural simulation D Genbrugge, S Eyerman, L Eeckhout HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010 | 187 | 2010 |
| Fine-grained DVFS using on-chip regulators S Eyerman, L Eeckhout ACM Transactions on Architecture and Code Optimization (TACO) 8 (1), 1-24, 2011 | 164 | 2011 |
| A counter architecture for online DVFS profitability estimation S Eyerman, L Eeckhout IEEE Transactions on Computers 59 (11), 1576-1583, 2010 | 107* | 2010 |
| Probabilistic job symbiosis modeling for SMT processor scheduling S Eyerman, L Eeckhout ACM SIGARCH Computer Architecture News 38 (1), 91-102, 2010 | 100 | 2010 |
| Criticality stacks: Identifying critical threads in parallel programs using synchronization behavior K Du Bois, S Eyerman, JB Sartor, L Eeckhout Proceedings of the 40th annual international symposium on computer …, 2013 | 97 | 2013 |
| Per-thread cycle accounting in SMT processors S Eyerman, L Eeckhout ACM Sigplan Notices 44 (3), 133-144, 2009 | 93 | 2009 |
| A memory-level parallelism aware fetch policy for SMT processors S Everman, L Eeckhout 2007 IEEE 13th International Symposium on High Performance Computer …, 2007 | 89 | 2007 |
| Characterizing the branch misprediction penalty S Eyerman, JE Smith, L Eeckhout 2006 IEEE International Symposium on Performance Analysis of Systems and …, 2006 | 82 | 2006 |
| Efficient design space exploration of high performance embedded out-of-order processors S Eyerman, L Eeckhout, K De Bosschere Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 79 | 2006 |
| Speedup Stacks: Identifying Scaling Bottlenecks in Multi-Threaded Applications S Eyerman, K Du Bois, L Eeckhout ISPASS 2012, 2012 | 75 | 2012 |
| Bottle graphs: Visualizing scalability bottlenecks in multi-threaded applications K Du Bois, JB Sartor, S Eyerman, L Eeckhout ACM SIGPLAN Notices 48 (10), 355-372, 2013 | 63 | 2013 |
| Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware S Eyerman, K Hoste, L Eeckhout (IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011 | 61 | 2011 |
| Analytical processor performance and power modeling using micro-architecture independent characteristics S Van den Steen, S Eyerman, S De Pestel, M Mechri, TE Carlson, ... IEEE Transactions on Computers 65 (12), 3537-3551, 2016 | 60 | 2016 |
| Restating the case for weighted-ipc metrics to evaluate multiprogram workload performance S Eyerman, L Eeckhout IEEE Computer Architecture Letters 13 (2), 93-96, 2013 | 56 | 2013 |
| A first-order mechanistic model for architectural vulnerability factor AA Nair, S Eyerman, L Eeckhout, LK John ACM SIGARCH Computer Architecture News 40 (3), 273-284, 2012 | 54 | 2012 |
Lieven EeckhoutProfessor of Computer Science and Engineering, Ghent University在 ugent.be 的电子邮件经过验证
