| Incorporation of hafnium and platinum metal in vertical power mosfets O Parmar, A Naugarhiya Journal of Computational Electronics 17, 1241-1248, 2018 | 10 | 2018 |
| Reduction in area‐specific on‐resistance with vertical stepped doped high‐k VDMOS O Parmar, N Gupta, A Naugarhiya International Journal of Numerical Modelling: Electronic Networks, Devices …, 2022 | 3 | 2022 |
| IoT based Motor Pump Control System I Kumar, Z Mishra, AS Rajput, O Parmar 2022 IEEE International Conference on Current Development in Engineering and …, 2022 | 1 | 2022 |
| Capacitive Analysis of Strained Superjunction Vertical Single Diffused MOSFET O Parmar, P Nautiyal, A Naugarhiya 2021 Devices for Integrated Circuit (DevIC), 139-142, 2021 | 1 | 2021 |
| Novel strained superjunction vertical single diffused MOSFET O Parmar, P Baghel, A Naugarhiya AEU-International Journal of Electronics and Communications 113, 152929, 2020 | 1 | 2020 |
| An Effective Charge Plasma based Semi-Superjunction MOSFET AS Lowanshi, O Parmar, A Gupta, A Naugarhiya 2019 IEEE International Conference on System, Computation, Automation and …, 2019 | 1 | 2019 |
| Design and performance projection of workfunction engineered variable vertical doped superjunction vertical single diffused mos P Nautiyal, O Parmar, A Naugarhiya, S Verma 2018 IEEE International Conference on Electronics, Computing and …, 2018 | 1 | 2018 |
| Dual‐Stepped Gate Vertical Double‐Diffused Metal‐Oxide‐Semiconductor Field‐Effect Transistor with Enhanced Device Performance DS Sidar, O Parmar, Z Mishra physica status solidi (a) 221 (4), 2300593, 2024 | | 2024 |
| Enhancement in the Design of VDMOS for Elimination of Parasitic BJT M Prasad, SK Sahu, O Parmar | | 2023 |
| Stepped Doped High k VDMOS: Switching Characteristics S Shukla, O Parmar, AS Rajput, Z Mishra physica status solidi (a) 220 (15), 2300311, 2023 | | 2023 |
| Gate Engineered IGBT with Improved Device Performance SK Sahu, O Parmar, ST Chacko, AS Rajput 2023 IEEE Devices for Integrated Circuit (DevIC), 13-16, 2023 | | 2023 |
| Optimised architectures of Midori block cipher for area-constrained IoT applications A Baghel, Z Mishra, O Parmar, AS Rajput International Journal of High Performance Systems Architecture 11 (4), 206-215, 2023 | | 2023 |
| Optimized Hardware Implementation of XXTEA-192 for Resource Constrained Applications N Khute, Z Mishra, AS Rajput, O Parmar 2022 IEEE International Conference on Current Development in Engineering and …, 2022 | | 2022 |
| Design and Analysis of a Multiplexer Using Domino CMOS Logic S Shukla, O Parmar, AS Rajput, Z Mishra International Conference on Robotics, Control, Automation and Artificial …, 2022 | | 2022 |
| Leakage Power Reduction in CMOS Inverter at 16 nm Technology Y Sahu, AS Rajput, O Parmar, Z Mishra International Conference on Robotics, Control, Automation and Artificial …, 2022 | | 2022 |
| Plasma Enhancement Semi-Superjunction Trench IGBT with Higher Figure-of-Merit N Gupta, P Roy, O Parmar, A Naugarhiya Journal of Electronic Materials 51 (5), 2576-2585, 2022 | | 2022 |
| High temperature analysis of strained superjunction vertical single diffused MOSFET O Parmar, A Naugarhiya International Journal of Modern Physics B 35 (19), 2150196, 2021 | | 2021 |
| Application of Workfunction Engineering in Lateral Power Devices O Parmar, A Naugarhiya 2018 Second International Conference on Advances in Electronics, Computers …, 2018 | | 2018 |
| Performance Parametric Optimization of Lateral and Vertical Power MOSFETs O Parmar Raipur, 0 | | |
Payal Nautiyal (Ph.D. Student)在 nitrr.ac.in 的电子邮件经过验证
Payal Nautiyal (Ph.D. Student)在 nitrr.ac.in 的电子邮件经过验证
Shrish VermaNational Institute of Technology Raipur,在 nitrr.ac.in 的电子邮件经过验证