| Fair cache sharing and partitioning in a chip multiprocessor architecture S Kim, D Chandra, Y Solihin Proceedings of the 13th International Conference on Parallel Architectures …, 2004 | 800 | 2004 |
| Predicting inter-thread cache contention on a chip multi-processor architecture D Chandra, F Guo, S Kim, Y Solihin High-Performance Computer Architecture, 2005. HPCA-11. 11th International …, 2005 | 752 | 2005 |
| Flexible low power probability density estimation unit for speech recognition U Pazhayaveetil, D Chandra, P Franzon Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on …, 2007 | 16 | 2007 |
| Architecture for low power large vocabulary speech recognition D Chandra, U Pazhayaveetil, PD Franzon SOC Conference, 2006 IEEE International, 25-28, 2006 | 14 | 2006 |
| Speech recognition co-processor D Chandra ProQuest, 2007 | 8 | 2007 |
| Fair Caching in a Chip Multiprocessor Architecture а S Kim, D Chandra, Y Solihin | 2 | |
| CSC-591R Design of Secure and Reliable Systems Feasibility Study of Linux Kernel Address Space Randomization RK Shetty, D Chandra | | |
