| The information processing factory: A paradigm for life cycle management of dependable systems EA Rambo, T Kadeed, R Ernst, M Seo, F Kurdahi, B Donyanavard, ... Proceedings of the International Conference on Hardware/Software Codesign …, 2019 | 18 | 2019 |
| Seams: Self-optimizing runtime manager for approximate memory hierarchies B Maity, B Donyanavard, A Surhonne, A Rahmani, A Herkersdorf, N Dutt ACM Transactions on Embedded Computing Systems (TECS) 20 (5), 1-26, 2021 | 17 | 2021 |
| The self-aware information processing factory paradigm for mixed-critical multiprocessing EA Rambo, B Donyanavard, M Seo, F Maurer, T Kadeed, CB de Melo, ... IEEE Transactions on Emerging Topics in Computing 10 (1), 250-266, 2020 | 11 | 2020 |
| An nfc based innovation for paperless retail transactions and digital receipts management V Vadde, CH Nithya, AP Surhonne 2015 Annual IEEE India Conference (INDICON), 1-6, 2015 | 8 | 2015 |
| GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization A Surhonne, NAV Doan, F Maurer, T Wild, A Herkersdorf International Conference on Architecture of Computing Systems, 271-285, 2022 | 5 | 2022 |
| Synthesis of multi-valued literal using Lukasiewicz logic AP Surhonne, D Bhattacharjee, A Chattopadhyay 2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 204-209, 2018 | 5 | 2018 |
| Automatic Test Pattern Generation for Multiple Missing Gate Faults in Reversible Circuits: Work in Progress Report AP Surhonne, A Chattopadhyay, R Wille Reversible Computation: 9th International Conference, RC 2017, Kolkata …, 2017 | 4 | 2017 |
| Information processing factory 2.0-self-awareness for autonomous collaborative systems N Sperling, A Bendrick, D Stöhrmann, R Ernst, B Donyanavard, F Maurer, ... 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 3 | 2023 |
| The information processing factory: Organization, terminology, and definitions EA Rambo, B Donyanavard, M Seo, F Maurer, T Kadeed, CB de Melo, ... arXiv preprint arXiv:1907.01578, 2019 | 3 | 2019 |
| AXES: approximation manager for emerging memory architectures B Maity, B Donyanavard, A Surhonne, A Rahmani, A Herkersdorf, N Dutt arXiv preprint arXiv:2011.08353, 2020 | 2 | 2020 |
| LCT-TL: Learning Classifier Table (LCT) with Transfer Learning for runtime SoC performance-power optimization A Surhonne, F Maurer, T Wild, A Herkersdorf 2023 IEEE 16th International Symposium on Embedded Multicore/Many-core …, 2023 | 1 | 2023 |
| Machine learning in run-time control of multicore processor systems F Maurer, M Thoma, AP Surhonne, B Donyanavard, A Herkersdorf it-Information Technology 65 (4-5), 164-176, 2023 | 1 | 2023 |
| LCT-DER: Learning Classifier Table with Dynamic-sized Experience Replay for run-time SoC performance-power optimization A Surhonne, F Maurer, T Wild, A Herkersdorf Proceedings of the Companion Conference on Genetic and Evolutionary …, 2023 | 1 | 2023 |
| Performance trade-off in decision diagram based synthesis of reversible logic circuits HV Jayashree, AP Surhonne, VK Agrawal 2015 IEEE International Conference on Electron Devices and Solid-State …, 2015 | 1 | 2015 |
| QoS-Aware Dynamic Frequency Scaling for Mixed-Critical Systems based on Shielded Reinforcement Learning F Maurer, M Meidinger, Y Lu, T Hallermeier, A Surhonne, T Wild, ... 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 1-6, 2024 | | 2024 |
| XCS with dynamic sized experience replay for memory constrained applications A Surhonne, M Wensauer, F Maurer, T Wild, A Herkersdorf Proceedings of the Genetic and Evolutionary Computation Conference Companion …, 2024 | | 2024 |
| EPIC-Q: Equivalent-Policy Invariant Comparison Enhanced Transfer Q-learning For Run-time SoC Performance-Power Optimization A Surhonne, HS Fawzi, F Maurer, O Lenke, M Meidinger, T Wild, ... International Conference on Embedded Computer Systems: Architectures …, 2024 | | 2024 |
| Multi-valued logic synthesis for Resistive Random Access Memory (RERAM) based in-memory computing SA Prakash | | 2018 |
Andreas HerkersdorfProfessor for Electrical and Computer Engineering在 tum.de 的电子邮件经过验证
