FlowGNN: A dataflow architecture for real-time workload-agnostic graph neural network inference R Sarkar, S Abi-Karam, Y He, L Sathidevi, C Hao 2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023 | 47* | 2023 |
GenGNN: A generic FPGA framework for graph neural network acceleration S Abi-Karam, Y He, R Sarkar, L Sathidevi, Z Qiao, C Hao arXiv preprint arXiv:2201.08475, 2022 | 17 | 2022 |
GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization S Abi-Karam, C Hao arXiv preprint arXiv:2303.16459, 2023 | 6 | 2023 |
INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing S Abi-Karam, R Sarkar, D Xu, Z Fan, Z Wang, C Hao 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 2 | 2023 |
HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond S Abi-Karam, R Sarkar, A Seigler, S Lowe, Z Wei, H Chen, N Rao, L John, ... arXiv preprint arXiv:2405.00820, 2024 | | 2024 |
Cask HLS: A Better Development Tool for Vitis HLS A Nazareth, B Perez, R Paul, J Root, R Samanta, W Vaught, S Abi-Karam, ... 2023 IEEE International Opportunity Research Scholars Symposium (ORSS), 20-23, 2023 | | 2023 |
M5: Multi-modal Multi-task Model Mapping on Multi-FPGA with Accelerator Configuration Search AK Kamath, S Abi-Karam, A Bhat, C Hao 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | | 2023 |
AN OPEN SOURCE FRAMEWORK FOR HIGH-LEVEL SYNTHESIS DATASET GENERATION FOR MACHINE LEARNING S Abi-Karam, R Sarkar, A Seigler, S Lowe, Z Wei, H Chen, N Rao, L John, ... | | |