Improving bank-level parallelism for irregular applications X Tang, M Kandemir, P Yedlapalli, J Kotra 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 50 | 2016 |
Chameleon: A dynamically reconfigurable heterogeneous memory system JB Kotra, H Zhang, AR Alameldeen, C Wilkerson, MT Kandemir 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 47 | 2018 |
{PEN}: Design and Evaluation of {Partial-Erase} for 3D {NAND-Based} High Density {SSDs} CY Liu, J Kotra, M Jung, M Kandemir 16th USENIX Conference on File and Storage Technologies (FAST 18), 67-82, 2018 | 42 | 2018 |
Meeting midway: Improving CMP performance with memory-side prefetching P Yedlapalli, J Kotra, E Kultursay, M Kandemir, CR Das, ... Proceedings of the 22nd International Conference on Parallel Architectures …, 2013 | 42 | 2013 |
Hardware-software co-design to mitigate dram refresh overheads: A case for refresh-aware process scheduling JB Kotra, N Shahidi, ZA Chishti, MT Kandemir ACM SIGPLAN Notices 52 (4), 723-736, 2017 | 41 | 2017 |
SOML read: Rethinking the read operation granularity of 3D NAND SSDs CY Liu, JB Kotra, M Jung, MT Kandemir, CR Das Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 40 | 2019 |
Re-nuca: A practical nuca architecture for reram based last-level caches JB Kotra, M Arjomand, D Guttman, MT Kandemir, CR Das 2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2016 | 37 | 2016 |
Network footprint reduction through data access and computation placement in noc-based manycores J Liu, J Kotra, W Ding, M Kandemir Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 22 | 2015 |
Enhancing computation-to-core assignment with physical location information O Kislal, J Kotra, X Tang, MT Kandemir, M Jung ACM SIGPLAN Notices 53 (4), 312-327, 2018 | 20 | 2018 |
Cache-aware approximate computing for decision tree learning O Kislal, MT Kandemir, J Kotra 2016 IEEE International Parallel and Distributed Processing Symposium …, 2016 | 17 | 2016 |
MDACache: Caching for multi-dimensional-access memories S George, MJ Liao, H Jiang, JB Kotra, MT Kandemir, J Sampson, ... 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 14 | 2018 |
Phase detection with hidden markov models for dvfs on many-core processors JD Booth, J Kotra, H Zhao, M Kandemir, P Raghavan 2015 IEEE 35th International Conference on Distributed Computing Systems …, 2015 | 14 | 2015 |
Improving the utilization of micro-operation caches in x86 processors JB Kotra, J Kalamatianos 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 13 | 2020 |
POSTER: Location-Aware Computation Mapping for Manycore Processors O Kislal, J Kotra, X Tang, MT Kandemir, M Jung 2017 26th International Conference on Parallel Architectures and Compilation …, 2017 | 13 | 2017 |
Congestion-aware memory management on NUMA platforms: A VMware ESXi case study JB Kotra, S Kim, K Madduri, MT Kandemir 2017 IEEE International Symposium on Workload Characterization (IISWC), 146-155, 2017 | 11 | 2017 |
Method and apparatus for virtualizing the micro-op cache J Kalamatianos, JB Kotra US Patent 10,884,751, 2021 | 9 | 2021 |
Multi-Level System Memory Having Near Memory Space Capable Of Behaving As Near Memory Cache or Fast Addressable System Memory Depending On System State JB Kotra, AR Alameldeen, CB Wilkerson, J Sim US Patent App. 15/276,677, 2018 | 9 | 2018 |
Prefam: Understanding the impact of prefetching in fabric-attached memory architectures VR Kommareddy, J Kotra, C Hughes, SD Hammond, A Awad Proceedings of the International Symposium on Memory Systems, 323-334, 2020 | 8 | 2020 |
Quantifying the potential benefits of on-chip near-data computing in manycore processors JB Kotra, D Guttman, MT Kandemir, CR Das 2017 IEEE 25th International Symposium on Modeling, Analysis, and Simulation …, 2017 | 8 | 2017 |
Thermal-aware application scheduling on device-heterogeneous embedded architectures K Swaminathan, J Kotra, H Liu, J Sampson, M Kandemir, V Narayanan 2015 28th International Conference on VLSI Design, 221-226, 2015 | 8 | 2015 |