A review of SiC power module packaging technologies: Challenges, advances, and emerging issues H Lee, V Smet, R Tummala IEEE Journal of Emerging and Selected Topics in Power Electronics 8 (1), 239-255, 2019 | 381 | 2019 |
Characterization of fluxing and hybrid underfills with micro‐encapsulated catalyst for long pot life YS Eom, JH Son, KS Jang, HS Lee, HC Bae, KS Choi, HS Choi ETRI Journal 36 (3), 343-351, 2014 | 44 | 2014 |
Fine‐Pitch Solder on Pad Process for Microbump Interconnection HC Bae, H Lee, KS Choi, YS Eom ETRI Journal 35 (6), 1152-1155, 2013 | 27 | 2013 |
Recent trends of flip chip bonding technology KS Choi, H Lee, HC Bae, YS Oem Electronics and telecommunications trends 28 (5), 100-110, 2013 | 20 | 2013 |
Sn58Bi Solder Interconnection for Low‐Temperature Flex‐on‐Flex Bonding H Lee, KS Choi, YS Eom, HC Bae, JH Lee Etri Journal 38 (6), 1163-1171, 2016 | 19 | 2016 |
Characterization and estimation of solder-on-pad process for fine-pitch applications H Lee, YS Eom, HC Bae, KS Choi, JH Lee IEEE Transactions on Components, Packaging and Manufacturing Technology 4 …, 2014 | 18 | 2014 |
Thermal management of glass panel embedded packages: Package architecture vs. power density R Wong, S Ravichandran, H Lee, V Smet 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 2105-2106, 2020 | 15 | 2020 |
Interconnection technology based on InSn solder for flexible display applications KS Choi, H Lee, HC Bae, YS Eom, JH Lee ETRI Journal 37 (2), 387-394, 2015 | 14 | 2015 |
Method of fabricating a semiconductor package KS Choi, HC Bae, YS Eom, JH Lee, LEE Haksun US Patent 9,853,010, 2017 | 13 | 2017 |
HV‐SoP Technology for Maskless Fine‐Pitch Bumping Process J Son, YS Eom, KS Choi, H Lee, HC Bae, JH Lee Etri Journal 37 (3), 523-532, 2015 | 13 | 2015 |
Bonding structure of electronic equipment KS Choi, HC Bae, LEE Haksun, YS Eom US Patent 9,538,666, 2017 | 10 | 2017 |
Stack module package and method for manufacturing the same KS Choi, HC Bae, YS Eom, LEE Haksun US Patent App. 14/685,400, 2015 | 10 | 2015 |
Development of Copper Electro-Plating Technology on a Screen-Printed Conductive Pattern with Copper Paste YS Eom, JH Son, HS Lee, KS Choi, HC Bae, JY Choi, TS Oh, JT Moon Journal of the Microelectronics and Packaging Society 22 (1), 51-54, 2015 | 9 | 2015 |
Maskless screen printing technology for 20μm-pitch, 52InSn solder interconnections in display applications KS Choi, H Lee, HC Bae, YS Eom 2014 IEEE 64th Electronic Components and Technology Conference (ECTC), 1154-1159, 2014 | 8 | 2014 |
Semiconductor package and method for manufacturing the same LEE Haksun, KS Choi, HC Bae, YS Eom US Patent App. 15/172,097, 2016 | 6 | 2016 |
Semiconductor device and method of manufacturing the same LEE Haksun, KS Choi, YS Eom, HC Bae US Patent App. 14/338,050, 2015 | 6 | 2015 |
Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module KS Choi, H Lee, HC Bae, YS Eom, K Lee, T Fukushima, M Koyanagi, ... 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 928-933, 2015 | 5 | 2015 |
Development of low contact resistance interconnection for display applications H Lee, YS Eom, HC Bae, KS Choi, JH Lee Proceedings of the 5th Electronics System-integration Technology Conference …, 2014 | 4 | 2014 |
Design of Low-Profile Integrated Transformer and Inductor for Substrate-Embedding in 1-5kW Isolated GaN DC-DC Converters H Lee, V Smet, PM Raj, R Tummala 2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 2256-2262, 2017 | 3 | 2017 |
Methods of forming bump and semiconductor device with the same KS Choi, YS Eom, HC Bae, LEE Haksun US Patent 9,006,037, 2015 | 3 | 2015 |