| A fully integrated dual-channel on-coil CMOS receiver for array coils in 1.5–10.5 T MRI B Sporrer, L Wu, L Bettini, C Vogt, J Reber, J Marjanovic, T Burger, ... IEEE transactions on biomedical circuits and systems 11 (6), 1245-1255, 2017 | 29 | 2017 |
| A dual-mode NB-IoT and EC-GSM RF-SoC achieving− 128-dBm extended-coverage and supporting OTDOA and A-GPS positioning M Korb, S Willi, B Weber, H Kröll, A Traber, S Altorfer, D Tschopp, J Rogin, ... ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018 | 15 | 2018 |
| Towards wearable MR detection: A stretchable wrist array with on-body digitization A Port, J Reber, C Vogt, J Marjanovic, B Sporrer, L Wu, A Mehmann, ... Proc Int Soc Magn Reson Med 26 (2018), 1, 2018 | 15 | 2018 |
| A power-efficient fractional-N DPLL with phase error quantized in fully differential-voltage domain L Wu, T Burger, P Schönle, Q Huang IEEE Journal of Solid-State Circuits 56 (4), 1254-1264, 2021 | 13 | 2021 |
| 27.4 A sub-1dB NF dual-channel on-coil CMOS receiver for Magnetic Resonance Imaging B Sporrer, L Wu, L Bettini, C Vogt, J Reber, J Marjanovic, T Burger, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 454-455, 2017 | 12 | 2017 |
| An adaptively biased output-capacitor-free low-dropout regulator with supply ripple subtraction and pole-tracking-compensation X Han, L Wu, Y Gao, WH Ki IEEE Transactions on Power Electronics 36 (11), 12795-12804, 2021 | 9 | 2021 |
| A 3.3-GHz 101fsrms-Jitter,− 250.3 dB FOM Fractional-N DPLL with Phase Error Detection Accomplished in Fully Differential Voltage Domain L Wu, T Burger, P Schönle, Q Huang 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 6 | 2020 |
| An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order Loop P Chen, X Huang, Y Chen, L Wu, RB Staszewski IEEE Transactions on Circuits and Systems I: Regular Papers 65 (11), 3734-3744, 2018 | 6 | 2018 |
| Ultrahigh PSR Output-Capacitor-Free Adaptively Biased 2-Power-Transistor LDO With 200-mV Dropout X Han, WH Ki, L Wu, Y Gao IEEE Solid-State Circuits Letters 5, 106-109, 2022 | 4 | 2022 |
| An Ultra-Low-Power ADPLL for BLE Applications L Wu | 3 | 2014 |
| Threshold switching enabled sub-pW-leakage, hysteresis-free circuits B Cheng, A Emboras, E Passerini, M Lewerenz, U Koch, L Wu, J Liao, ... IEEE Transactions on Electron Devices 68 (6), 3112-3118, 2021 | 2 | 2021 |
| An Energy-Efficient Asynchronous Hybrid-Searching Algorithm for Auto Frequency Calibration in IEEE 802.11 ax Applications Z Wang, L Wu, P Zhang, H Zhang 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | | 2023 |
| Design of Power-Efficient High-Purity Phase-locked Frequency Synthesis L Wu ETH Zurich, 2020 | | 2020 |
| MR Probe Design with On-Coil Digital Receiver DO Brunner, B Sporrer, C Vogt, J Reber, J Marjanovic, L Bettini, L Wu, ... Proc. Intl. Soc. Mag. Reson. Med 24, 0547, 2016 | | 2016 |
Luca BettiniEngineering Manager | Cambridge MBA | PhD at ETH Zurich在 knowles.com 的电子邮件经过验证
