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Robert Chivas
Robert Chivas
Varioscale Inc
在 varioscale.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
Steps toward automated deprocessing of integrated circuits
EL Principe, N Asadizanjani, D Forte, M Tehranipoor, R Chivas, ...
International Symposium for Testing and Failure Analysis 81504, 285-298, 2017
402017
Visible light LVP on bulk silicon devices
J Beutler, VC Hodges, JJ Clement, J Stevens, EI Cole Jr, S Silverman, ...
International Symposium for Testing and Failure Analysis 81030, 6-13, 2015
252015
Contactless fault isolation for FinFET technologies with visible light and GaP SIL
H Lohrke, P Scholz, A Beyreuther, C Boit, E Uhlmann, S Kühne, ...
International Symposium for Testing and Failure Analysis 81368, 19-26, 2016
232016
High definition scintillation detector for medicine, homeland security and non-destructive evaluation
TF Morse, R Gupta, CB Roberts, RD Chivas
US Patent 8,477,906, 2013
212013
Synthesis and photoluminescence of ultra-pure germanium nanoparticles
R Chivas, S Yerci, R Li, L Dal Negro, TF Morse
Optical Materials 33 (11), 1829-1832, 2011
192011
Plasma FIB deprocessing of integrated circuits from the backside
EL Principe, N Asadizanjani, D Forte, M Tehranipoor, R Chivas, ...
ASM International 19 (4), 36-44, 2017
152017
Adaptive Grinding and Polishing of Silicon Integrated Circuits to Ultra-thin Remaining Thickness
R Chivas, S Silverman, M DiBattista
International Symposium for Testing and Failure Analysis 81030, 460-465, 2015
142015
Fast, full chip image stitching of nanoscale integrated circuits
D Zhang, G Van Der Wal, P Miller, D Stoker, E Matlin, N Marri, G Gan, ...
Technical report, 2019
112019
Preparation of Wafer Level Packaged Integrated Circuits Using Pulsed Laser Assisted Chemical Etching
R Chivas, N Dandekar, S Silverman, R Cruz, M DiBattista
International Symposium for Testing and Failure Analysis 39791, 491-497, 2012
92012
Pulsed Laser Assisted Chemical Etch for analytic surface preparation
R Chivas, S Silverman, N Dandekar
2012 IEEE International Reliability Physics Symposium (IRPS), 2D. 6.1-2D. 6.8, 2012
72012
Adaptive grinding and polishing of packaged integrated circuits
R Chivas, S Silverman
2014 IEEE International Reliability Physics Symposium, FA. 4.1-FA. 4.6, 2014
52014
Laser-Assisted Chemical Polishing of Silicon (112) Wafers
N Dandekar, R Chivas, S Silverman, X Kou, M Goorsky
Journal of electronic materials 41, 2790-2794, 2012
52012
Laser Chemical Etching Trench Refinements for Backside Debug Journey to the Circuit Layer
MM Mulholland, S Tan, MU Raza, M Levesque, J Furlong, CGL Ferri, ...
International Symposium for Testing and Failure Analysis 83348, 357-361, 2020
22020
Submicron thinning of finFET devices with high power density observed in 10/7nm process nodes using high aspect ratio trenches
N Bakken, V Vlasyuk, M Beal, I Artishuk, R Chivas, M DiBattista, ...
International Symposium for Testing and Failure Analysis 82747, 454-459, 2019
22019
Electrical Invasiveness of Grinding and Polishing Silicon Integrated Circuits Down to 1 μm Remaining Silicon Thickness
R Chivas, S Silverman, M DiBattista, U Kindereit
International Symposium for Testing and Failure Analysis 81368, 166-171, 2016
22016
Photo: What a difference a micron makes.
J Beutler, KD Greth, S Silverman, R Chivas
Sandia National Lab.(SNL-NM), Albuquerque, NM (United States), 2015
2015
Visible Light LVP on Bulk Silicon Substrates.
J Beutler, JJ Clement, J Stevens, VC Hodges, S Silverman, R Chivas
Sandia National Lab.(SNL-NM), Albuquerque, NM (United States), 2015
2015
Aerosol deposition process for synthesizing optically active nano-scale materials
RD Chivas
Dissertation Abstracts International 68 (04), 2007
2007
Steps Toward Computational Guided Deprocessing of Integrated Circuits
EL Principe, N Asadizanjani, D Forte, M Tehranipoor, R Chivas, ...
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