| Three-dimensional NAND flash architecture design based on single-crystalline stacked array Y Kim, JG Yun, SH Park, W Kim, JY Seo, M Kang, KC Ryoo, JH Oh, ... IEEE Transactions on Electron Devices 59 (1), 35-45, 2011 | 318 | 2011 |
| Single-crystalline Si stacked array (STAR) NAND flash memory JG Yun, G Kim, JE Lee, Y Kim, WB Shim, JH Lee, H Shin, JD Lee, ... IEEE Transactions on Electron Devices 58 (4), 1006-1014, 2011 | 258 | 2011 |
| A simple and analytical parameter-extraction method of a microwave MOSFET I Kwon, M Je, K Lee, H Shin IEEE Transactions on Microwave Theory and Techniques 50 (6), 1503-1509, 2002 | 180 | 2002 |
| A simple wide-band on-chip inductor model for silicon-based RF ICs J Gil, H Shin IEEE Transactions on Microwave Theory and Techniques 51 (9), 2023-2028, 2003 | 158 | 2003 |
| Fabrication and room-temperature characterization of a silicon self-assembled quantum-dot transistor BH Choi, SW Hwang, IG Kim, HC Shin, Y Kim, EK Kim Applied Physics Letters 73 (21), 3129-3131, 1998 | 147 | 1998 |
| Thin gate oxide damage due to plasma processing HC Shin, C Hu Semiconductor Science and Technology 11 (4), 463, 1996 | 128 | 1996 |
| Analytical drain thermal noise current model valid for deep submicron MOSFETs K Han, H Shin, K Lee IEEE Transactions on Electron Devices 51 (2), 261-269, 2004 | 127 | 2004 |
| Highly functional and reliable 8Mb STT-MRAM embedded in 28nm logic YJ Song, JH Lee, HC Shin, KH Lee, K Suh, JR Kang, SS Pyo, HT Jung, ... 2016 IEEE International Electron Devices Meeting (IEDM), 27.2. 1-27.2. 4, 2016 | 121 | 2016 |
| Flash memory element and manufacturing method thereof JH Lee, HC Shin US Patent 6,768,158, 2004 | 114 | 2004 |
| Demonstration of highly manufacturable STT-MRAM embedded in 28nm logic YJ Song, JH Lee, SH Han, HC Shin, KH Lee, K Suh, DE Jeong, GH Koh, ... 2018 IEEE International Electron Devices Meeting (IEDM), 18.2. 1-18.2. 4, 2018 | 97 | 2018 |
| Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier K Han, J Gil, SS Song, J Han, H Shin, CK Kim, K Lee IEEE Journal of Solid-State Circuits 40 (3), 726-735, 2005 | 95 | 2005 |
| Non-quasi-static small-signal modeling and analytical parameter extraction of SOI FinFETs IM Kang, H Shin IEEE transactions on nanotechnology 5 (3), 205-210, 2006 | 94 | 2006 |
| Room temperature single electron effects in a Si nano-crystal memory I Kim, S Han, K Han, J Lee, H Shin IEEE Electron Device Letters 20 (12), 630-631, 1999 | 92 | 1999 |
| Characteristics of p-channel Si nano-crystal memory K Han, I Kim, H Shin IEEE Transactions on Electron Devices 48 (5), 874-879, 2001 | 89 | 2001 |
| Thin oxide damage by plasma etching and ashing processes H Shin, C King, C Hu 30th Annual Proceedings Reliability Physics 1992, 37-41, 1992 | 87 | 1992 |
| Plasma etching charge-up damage to thin oxides H Shin, N Jha, Q Xue-Yu, GW Hills, C Hu Solid State Technology 36 (8), 29-35, 1993 | 82 | 1993 |
| Electron trap density distribution of Si-rich silicon nitride extracted using the modified negative charge decay model of silicon-oxide-nitride-oxide-silicon structure at … TH Kim, IH Park, JD Lee, HC Shin, BG Park Applied physics letters 89 (6), 2006 | 80 | 2006 |
| A simple parameter extraction method of spiral on-chip inductors M Kang, J Gil, H Shin IEEE Transactions on Electron Devices 52 (9), 1976-1981, 2005 | 79 | 2005 |
| Modeling oxide thickness dependence of charging damage by plasma processing H Shin, K Noguchi, C Hu IEEE Electron Device Letters 14 (11), 509-511, 1993 | 79 | 1993 |
| Characterization of oxide traps leading to RTN in high-k and metal gate MOSFETs S Lee, HJ Cho, Y Son, DS Lee, H Shin 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 73 | 2009 |
