A CMOS time-to-digital converter with better than 10 ps single-shot precision JP Jansson, A Mantyniemi, J Kostamovaara IEEE Journal of Solid-State Circuits 41 (6), 1286-1296, 2006 | 341 | 2006 |
A CMOS time-to-digital converter (TDC) based on a cyclic time domain successive approximation interpolation method A Mantyniemi, T Rahkonen, J Kostamovaara IEEE Journal of Solid-State Circuits 44 (11), 3067-3078, 2009 | 195 | 2009 |
A multichannel high-precision CMOS time-to-digital converter for laser-scanner-based perception systems JP Jansson, V Koskinen, A Mantyniemi, J Kostamovaara IEEE Transactions on Instrumentation and Measurement 61 (9), 2581-2590, 2012 | 104 | 2012 |
A CMOS time-to-digital converter based on a ring oscillator for a laser radar I Nissinen, A Mantyniemi, J Kostamovaara ESSCIRC 2004-29th European Solid-State Circuits Conference (IEEE Cat. No …, 2003 | 81 | 2003 |
Synchronization in a multilevel CMOS time-to-digital converter JP Jansson, A Mantyniemi, J Kostamovaara IEEE Transactions on Circuits and Systems I: regular papers 56 (8), 1622-1634, 2008 | 72 | 2008 |
An integrated 9-channel time digitizer with 30 ps resolution A Mantyniemi, T Rahkonen, J Kostamovaara 2002 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2002 | 62 | 2002 |
A high resolution digital CMOS time-to-digital converter based on nested delay locked loops A Mantyniemi, T Rahkonen, J Kostamovaara 1999 IEEE International Symposium on Circuits and Systems (ISCAS) 2, 537-540, 1999 | 53 | 1999 |
Scannerless imaging pulsed-laser range finding H Ailisto, V Heikkinen, R Mitikka, R Myllylä, J Kostamovaara, ... Journal of Optics A: Pure and Applied Optics 4 (6), S337, 2002 | 49 | 2002 |
A delay line based CMOS time digitizer IC with 13 ps single-shot precision J Jansson, A Mantyniemi, J Kostamovaara 2005 IEEE International Symposium on Circuits and Systems, 4269-4272, 2005 | 33 | 2005 |
A nonlinearity-corrected CMOS time digitizer IC with 20 ps single-shot precision A Mantyniemi, T Rahkonen, J Kostamovaara 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat …, 2002 | 33 | 2002 |
Imaging distance measurements using TOF lidar R Myllylä, J Marszalec, J Kostamovaara, A Mäntyniemi, GJ Ulbrich Journal of optics 29 (3), 188, 1998 | 33 | 1998 |
A 12-bit digital-to-time converter (DTC) with sub-ps-level resolution using current DAC and differential switch for time-to-digital converter (TDC) S Alahdab, A Mäntyniemi, J Kostamovaara 2012 IEEE International Instrumentation and Measurement Technology …, 2012 | 29 | 2012 |
A 9-channel integrated time-to-digital converter with sub-nanosecond resolution A Mantyniemi, T Rahkonen, J Kostamovaara Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to …, 1997 | 25 | 1997 |
An integrated digital CMOS time-to-digital converter with sub-gate-delay resolution A Ma¨ ntyniemi, T Rahkonen, J Kostamovaara Analog Integrated Circuits and Signal Processing 22, 61-70, 2000 | 23 | 2000 |
A 12-bit digital-to-time converter (DTC) for time-to-digital converter (TDC) and other time domain signal processing applications S Al-Ahdab, A Mäntyniemi, J Kostamovaara NORCHIP 2010, 1-4, 2010 | 22 | 2010 |
An integrated CMOS high precision time-to-digital converter based on stabilised three-stage delay line interpolation A Mäntyniemi University of Oulu, 2004 | 20 | 2004 |
A DDS synthesizer with digital time domain interpolator T Rahkonen, H Eksyma, A Mäntyniemi, H Repo Analog Integrated Circuits and Signal Processing 27 (1), 109-116, 2001 | 20 | 2001 |
Cyclic time domain successive approximation time-to-digital converter (TDC) with sub-ps-level resolution S Al-Ahdab, A Mäntyniemi, J Kostamovaara 2011 IEEE International Instrumentation and Measurement Technology …, 2011 | 19 | 2011 |
A time-to-digital converter (TDC) with a 13-bit cyclic time domain successive approximation interpolator with sub-ps-level resolution using current DAC and differential switch S Alahdab, A Mäntyniemi, J Kostamovaara 2013 IEEE 56th International Midwest Symposium on Circuits and Systems …, 2013 | 17 | 2013 |
A 30 MHz DDS clock generator with 8-bit, 130 ps delay generator and-50 dBc spurious level A Heiskanen, A Mantyniemi, T Rahkonen Proceedings of the 27th European Solid-State Circuits Conference, 401-404, 2001 | 13 | 2001 |