关注
Linyan Mei
Linyan Mei
其他姓名梅琳焱
MICAS - ESAT, KU Leuven, Belgium
在 kuleuven.be 的电子邮件经过验证
标题
引用次数
引用次数
年份
ZigZag: Enlarging joint architecture-mapping design space exploration for DNN accelerators
L Mei, P Houshmand, V Jain, S Giraldo, M Verhelst
IEEE Transactions on Computers 70 (8), 1160-1174, 2021
1152021
Review and benchmarking of precision-scalable multiply-accumulate unit architectures for embedded neural-network processing
V Camus, L Mei, C Enz, M Verhelst
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (4 …, 2019
942019
Sub-word parallel precision-scalable MAC engines for efficient embedded DNN inference
L Mei, M Dandekar, D Rodopoulos, J Constantin, P Debacker, ...
2019 IEEE international conference on artificial intelligence circuits and …, 2019
402019
Opportunities and limitations of emerging analog in-memory compute DNN architectures
P Houshmand, S Cosemans, L Mei, I Papistas, D Bhattacharjee, ...
2020 IEEE International Electron Devices Meeting (IEDM), 29.1. 1-29.1. 4, 2020
282020
Defines: Enabling fast exploration of the depth-first scheduling space for dnn accelerators through analytical modeling
L Mei, K Goetschalckx, A Symons, M Verhelst
2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023
252023
Tinyvers: A tiny versatile system-on-chip with state-retentive eMRAM for ML inference at the extreme edge
V Jain, S Giraldo, J De Roose, L Mei, B Boons, M Verhelst
IEEE Journal of Solid-State Circuits 58 (8), 2360-2371, 2023
232023
TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, tiny versatile system-on-chip with state-retentive eMRAM for machine learning inference at the extreme edge
V Jain, S Giraldo, J De Roose, B Boons, L Mei, M Verhelst
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
232022
ZigZag: A memory-centric rapid DNN accelerator design space exploration framework
L Mei, P Houshmand, V Jain, S Giraldo, M Verhelst
arXiv preprint arXiv:2007.11360, 2020
212020
LOMA: Fast auto-scheduling on DNN accelerators through loop-order-based memory allocation
A Symons, L Mei, M Verhelst
2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021
152021
Towards heterogeneous multi-core accelerators exploiting fine-grained scheduling of layer-fused deep neural networks
A Symons, L Mei, S Colleman, P Houshmand, S Karl, M Verhelst
arXiv preprint arXiv:2212.10612, 2022
112022
ML processors are going multi-core: A performance dream or a scheduling nightmare?
M Verhelst, M Shi, L Mei
IEEE Solid-State Circuits Magazine 14 (4), 18-27, 2022
112022
A uniform latency model for dnn accelerators with diverse architectures and dataflows
L Mei, H Liu, T Wu, HE Sumbul, M Verhelst, E Beigne
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 220-225, 2022
112022
Taxonomy and benchmarking of precision-scalable MAC arrays under enhanced DNN dataflow representation
EM Ibrahim, L Mei, M Verhelst
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (5), 2013-2024, 2022
102022
Processor architecture optimization for spatially dynamic neural networks
S Colleman, T Verelst, L Mei, T Tuytelaars, M Verhelst
2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration …, 2021
92021
Hardware-efficient residual neural network execution in line-buffer depth-first processing
M Shi, P Houshmand, L Mei, M Verhelst
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (4 …, 2021
82021
Analyzing the energy-latency-area-accuracy trade-off across contemporary neural networks
V Jain, L Mei, M Verhelst
2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021
42021
Stream: A Modeling Framework for Fine-grained Layer Fusion on Multi-core DNN Accelerators
A Symons, L Mei, S Colleman, P Houshmand, S Karl, M Verhelst
2023 IEEE International Symposium on Performance Analysis of Systems and …, 2023
32023
CONVOLVE: Smart and seamless design of smart edge processors
M Gomony, F Putter, A Gebregiorgis, G Paulin, L Mei, V Jain, S Hamdioui, ...
arXiv preprint arXiv:2212.00873, 2022
32022
Survey and benchmarking of precision-scalable mac arrays for embedded dnn processing
EM Ibrahim, L Mei, M Verhelst
arXiv preprint arXiv:2108.04773 4, 2021
22021
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators
VJB Jung, A Symons, L Mei, M Verhelst, L Benini
2023 IEEE 5th International Conference on Artificial Intelligence Circuits …, 2023
12023
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