Post-quantum lattice-based cryptography implementations: A survey H Nejatollahi, N Dutt, S Ray, F Regazzoni, I Banerjee, R Cammarota ACM Computing Surveys (CSUR) 51 (6), 1-41, 2019 | 258 | 2019 |
Internet-of-things security and vulnerabilities: Taxonomy, challenges, and practice K Chen, S Zhang, Z Li, Y Zhang, Q Deng, S Ray, Y Jin Journal of Hardware and Systems Security 2, 97-110, 2018 | 216 | 2018 |
The changing computing paradigm with internet of things: A tutorial introduction S Ray, Y Jin, A Raychowdhury IEEE Design & Test 33 (2), 76-96, 2016 | 152 | 2016 |
Challenges and trends in modern SoC design verification W Chen, S Ray, J Bhadra, M Abadir, LC Wang IEEE Design & Test 34 (5), 7-22, 2017 | 127 | 2017 |
A survey of hybrid techniques for functional verification J Bhadra, MS Abadir, LC Wang, S Ray IEEE Design & Test of Computers 24 (02), 112-122, 2007 | 98 | 2007 |
System-on-chip platform security assurance: Architecture and validation S Ray, E Peeters, MM Tehranipoor, S Bhunia Proceedings of the IEEE 106 (1), 21-37, 2017 | 87 | 2017 |
Security assurance for system-on-chip designs with untrusted IPs A Basak, S Bhunia, T Tkacik, S Ray IEEE Transactions on Information Forensics and Security 12 (7), 1515-1528, 2017 | 81 | 2017 |
Post-silicon validation in the SoC era: A tutorial introduction P Mishra, R Morad, A Ziv, S Ray IEEE Design & Test 34 (3), 68-92, 2017 | 80 | 2017 |
A flexible architecture for systematic implementation of SoC security policies A Basak, S Bhunia, S Ray 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 536-543, 2015 | 64 | 2015 |
Efficient trace signal selection using augmentation and ILP techniques K Rahmani, P Mishra, S Ray Fifteenth international symposium on quality electronic design, 148-155, 2014 | 62 | 2014 |
Verification condition generation via theorem proving J Matthews, JS Moore, S Ray, D Vroon Logic for Programming, Artificial Intelligence, and Reasoning: 13th …, 2006 | 60 | 2006 |
Robust bitstream protection in FPGA-based systems through low-overhead obfuscation R Karam, T Hoque, S Ray, M Tehranipoor, S Bhunia 2016 International Conference on ReConFigurable Computing and FPGAs …, 2016 | 52 | 2016 |
Can't see the forest for the trees: State restoration's limitations in post-silicon trace signal selection S Ma, D Pal, R Jiang, S Ray, S Vasudevan 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2015 | 50 | 2015 |
Resilient cooperative adaptive cruise control for autonomous vehicles using machine learning S Boddupalli, AS Rao, S Ray IEEE Transactions on Intelligent Transportation Systems 23 (9), 15655-15672, 2022 | 44 | 2022 |
System-on-chip security architecture and CAD framework for hardware patch APD Nath, S Ray, A Basak, S Bhunia 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 733-738, 2018 | 44 | 2018 |
Exploiting design-for-debug for flexible SoC security architecture A Basak, S Bhunia, S Ray Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 43 | 2016 |
Security policy enforcement in modern SoC designs S Ray, Y Jin 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 345-350, 2015 | 43 | 2015 |
Efficient execution in an automated reasoning environment DA Greve, M Kaufmann, P Manolios, JS Moore, S Ray, JL Ruiz-Reina, ... Journal of Functional Programming 18 (1), 15-46, 2008 | 43 | 2008 |
Deductive verification of pipelined machines using first-order quantification S Ray, WA Hunt Computer Aided Verification: 16th International Conference, CAV 2004, Boston …, 2004 | 42 | 2004 |
Optimizing equivalence checking for behavioral synthesis K Hao, F Xie, S Ray, J Yang 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 40 | 2010 |