ASAP7: A 7-nm finFET predictive process design kit LT Clark, V Vashishtha, L Shifren, A Gujja, S Sinha, B Cline, ... Microelectronics Journal 53, 105-115, 2016 | 531 | 2016 |
TeraPHY: a chiplet technology for low-power, high-bandwidth in-package optical I/O M Wade, E Anderson, S Ardalan, P Bhargava, S Buchbinder, ... IEEE Micro 40 (2), 63-71, 2020 | 122 | 2020 |
An error-free 1 Tbps WDM optical I/O chiplet and multi-wavelength multi-port laser M Wade, E Anderson, S Ardalan, W Bae, B Beheshtian, S Buchbinder, ... Optical Fiber Communication Conference, F3C. 6, 2021 | 76 | 2021 |
An embedded microprocessor radiation hardened by microarchitecture and circuits LT Clark, DW Patterson, C Ramamurthy, KE Holbert IEEE Transactions on Computers 65 (2), 382-395, 2015 | 32 | 2015 |
Teraphy: An o-band wdm electro-optic platform for low power, terabit/s optical i/o C Sun, D Jeong, M Zhang, W Bae, C Zhang, P Bhargava, D Van Orden, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 31 | 2020 |
High performance low power pulse-clocked TMR circuits for soft-error hardness C Ramamurthy, S Chellappa, V Vashishtha, A Gogulamudi, LT Clark IEEE Transactions on Nuclear Science 62 (6), 3040-3048, 2015 | 20 | 2015 |
Advanced encryption system with dynamic pipeline reconfiguration for minimum energy operation S Chellappa, C Ramamurthy, V Vashishtha, LT Clark Sixteenth International Symposium on Quality Electronic Design, 201-206, 2015 | 14 | 2015 |
Physical design methodologies for soft error mitigation using redundancy C Ramamurthy, S Chellappa, LT Clark 2015 15th European Conference on Radiation and Its Effects on Components and …, 2015 | 12 | 2015 |
Muller C-element self-corrected triple modular redundant logic with multithreading and low power modes C Ramamurthy, A Gujja, V Vashishtha, S Chellappa, LT Clark 2017 17th European Conference on Radiation and Its Effects on Components and …, 2017 | 10 | 2017 |
Monolithic microring-based WDM optical I/O for heterogeneous computing M Wade, D Jeong, B Kim, M Zhang, W Bae, C Zhang, P Bhargava, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 9 | 2021 |
Techniques for generating physical layouts of in silico multi mode integrated circuits LT Clark, DW Patterson, C Ramamurthy, S Chellappa US Patent 9,734,272, 2017 | 8 | 2017 |
Redundant skewed clocking of pulse-clocked latches for low power soft error mitigation A Gujja, S Chellappa, C Ramamurthy, LT Clark 2015 15th European Conference on Radiation and Its Effects on Components and …, 2015 | 6 | 2015 |
Systematic analysis of the timing and power impact of pure lines and cuts routing for multiple patterning V Vashishtha, L Masand, A Dosi, C Ramamurthy, LT Clark Design-Process-Technology Co-optimization for Manufacturability XI 10148 …, 2017 | 4 | 2017 |
Sequential state elements radiation hardened by design LT Clark, S Shambhulingaiah, S Kumar, C Ramamurthy US Patent 9,054,688, 2015 | 4 | 2015 |
Polarization diverse receiver with delays F John, A Khilo, C Sun, P Bhargava, C Ramamurthy US Patent 11,988,881, 2024 | 1 | 2024 |
Modeling of Bias-Dependent Single Event Transients for Circuit Sensitivity Calculation C Ramamurthy, Z Giorno, M Turowski, E Mikkola 2023 IEEE 66th International Midwest Symposium on Circuits and Systems …, 2023 | | 2023 |
Hardened By Design All-Digital Pulsed Multiplying DLL for DDR2-3 Interfaces C Ramamurthy, LT Clark 2017 17th European Conference on Radiation and Its Effects on Components and …, 2017 | | 2017 |
Radiation Hardened by Design Methodologies for Soft-Error Mitigated Digital Architectures C Ramamurthy Arizona State University, 2017 | | 2017 |
Chip Level Implementation Techniques for Radiation Hardened Microprocessors C Ramamurthy Arizona State University, 2013 | | 2013 |
Comparing the Speed, Power, and Performance of Triple Mode Redundant and Temporal Flip-flop Hardened Microcontrollers S Shambhulingaiah, LT Clark, S Chellappa, C Ramamurthy | | |