| Covalent Nitrogen Doping and Compressive Strain in MoS2 by Remote N2 Plasma Exposure A Azcatl, X Qin, A Prakash, C Zhang, L Cheng, Q Wang, N Lu, MJ Kim, ... Nano Letters, 2016 | 415 | 2016 |
| Toward Low-Power Electronics: Tunneling Phenomena in Transition Metal Dichalcogenides S Das*, A Prakash*, R Salazar, J Appenzeller ACS nano, 2014 | 211 | 2014 |
| Understanding contact gating in Schottky barrier transistors from 2D channels A Prakash, H Ilatikhameneh, P Wu, J Appenzeller Scientific Reports 7, 2017 | 113 | 2017 |
| Bandgap Extraction and Device Analysis of Ionic Liquid Gated WSe2 Schottky Barrier Transistors A Prakash, J Appenzeller ACS Nano 11, 2017 | 65 | 2017 |
| Low-frequency noise in MoSe2 field effect transistors SR Das, J Kwon, A Prakash, CJ Delker, S Das, DB Janes Applied Physics Letters 106 (8), 083507, 2015 | 60 | 2015 |
| Reducing post-read disturb in a nonvolatile memory device A Prakash, A Khandelwal, D Dutta, H Tseng, W Zhao, D Zhao US Patent 10,726,891, 2020 | 14 | 2020 |
| Countermeasures for first read issue YC Lien, HY Tseng, D Dutta, A Prakash US Patent 10,861,537, 2020 | 12 | 2020 |
| Correlating Electronic Transport and 1/f Noise in Field-Effect Transistors J Kwon, A Prakash, SR Das, DB Janes Physical Review Applied 10 (6), 064029, 2018 | 9 | 2018 |
| First demonstration of band-to-band tunneling in black phosphorus P Wu, A Prakash, J Appenzeller 2017 75th Annual Device Research Conference (DRC), 1-2, 2017 | 9 | 2017 |
| Refresh operations for dedicated groups of blocks of memory cells A Prakash, J Yuan US Patent 11,043,280, 2021 | 8 | 2021 |
| MEMORY DEVICE WITH IMPROVED ENDURANCE X Yang, M Higanshitani, A Prakash US Patent App. 17/403,310, 2023 | 7 | 2023 |
| Ionic gated WSe2 FETs: towards transparent Schottky barriers A Prakash, S Das, R Mehta, Z Chen, J Appenzeller 72nd Device Research Conference, 129-130, 2014 | 6 | 2014 |
| Reducing post-read disturb in a nonvolatile memory device A Prakash, A Khandelwal US Patent 11,139,030, 2021 | 5 | 2021 |
| Read operation or word line voltage refresh operation in memory device with reduced peak current A Prakash US Patent 11,501,837, 2022 | 4 | 2022 |
| Temperature and cycling dependent refresh operation for memory cells A Prakash, VB Shanthakumar, J Yuan US Patent 11,037,641, 2021 | 4 | 2021 |
| Refresh operations for memory cells based on susceptibility to read errors A Prakash, J Yuan US Patent 11,264,110, 2022 | 3 | 2022 |
| Memory device that is optimized for operation at different temperatures A Prakash, X Yang, D Zhao US Patent 11,961,573, 2024 | 2 | 2024 |
| Method to fix cumulative read induced drain side select gate downshift in memory apparatus with on-pitch drain side select gate X Yang, A Prakash, S Mukherjee US Patent 11,894,067, 2024 | 1 | 2024 |
| Techniques for erasing the memory cells of edge word lines J Guo, X Yang, A Prakash US Patent 11,848,059, 2023 | 1 | 2023 |
| Pre-position dummy word line to facilitate write erase capability of memory apparatus X Yang, A Prakash US Patent App. 17/665,267, 2023 | 1 | 2023 |
Joerg AppenzellerProfessor of Electrical and Computer Engineering, Purdue University在 purdue.edu 的电子邮件经过验证
