The gem5 simulator N Binkert, B Beckmann, G Black, SK Reinhardt, A Saidi, A Basu, ... ACM SIGARCH computer architecture news 39 (2), 1-7, 2011 | 5994 | 2011 |
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset MMK Martin, DJ Sorin, BM Beckmann, MR Marty, M Xu, AR Alameldeen, ... ACM SIGARCH Computer Architecture News 33 (4), 92-99, 2005 | 2102 | 2005 |
Amdahl's law in the multicore era MD Hill, MR Marty Computer 41 (7), 33-38, 2008 | 1950 | 2008 |
Weak ordering—a new definition SV Adve, MD Hill ACM SIGARCH Computer Architecture News 18 (2SI), 2-14, 1990 | 991 | 1990 |
LogTM: Log-based transactional memory KE Moore, J Bobba, MJ Moravan, MD Hill, DA Wood The Twelfth International Symposium on High-Performance Computer …, 2006 | 965 | 2006 |
Evaluating associativity in CPU caches MD Hill, AJ Smith IEEE Transactions on Computers 38 (12), 1612-1630, 1989 | 896 | 1989 |
DBMSs on a modern processor: Where does time go? A Ailamaki, DJ DeWitt, MD Hill, DA Wood VLDB'99, Proceedings of 25th International Conference on Very Large Data …, 1999 | 763 | 1999 |
Weaving Relations for Cache Performance. A Ailamaki, DJ DeWitt, MD Hill, M Skounakis VLDB 1, 169-180, 2001 | 566 | 2001 |
A" flight data recorder" for enabling full-system multiprocessor deterministic replay M Xu, R Bodik, MD Hill Proceedings of the 30th annual international symposium on Computer …, 2003 | 531 | 2003 |
The wisconsin wind tunnel: Virtual prototyping of parallel computers SK Reinhardt, MD Hill, JR Larus, AR Lebeck, JC Lewis, DA Wood Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and …, 1993 | 524 | 1993 |
A primer on memory consistency and cache coherence D Sorin, M Hill, D Wood Springer Nature, 2022 | 515 | 2022 |
Cache-conscious structure layout TM Chilimbi, MD Hill, JR Larus Proceedings of the ACM SIGPLAN 1999 conference on Programming language …, 1999 | 502 | 1999 |
LogTM-SE: Decoupling hardware transactional memory from caches L Yen, J Bobba, MR Marty, KE Moore, H Volos, MD Hill, MM Swift, ... 2007 IEEE 13th International Symposium on High Performance Computer …, 2007 | 462 | 2007 |
SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery DJ Sorin, MMK Martin, MD Hill, DA Wood ACM SIGARCH Computer Architecture News 30 (2), 123-134, 2002 | 426 | 2002 |
Token coherence: Decoupling performance and correctness MMK Martin, MD Hill, DA Wood ACM SIGARCH Computer Architecture News 31 (2), 182-193, 2003 | 422 | 2003 |
Efficient virtual memory for big memory servers A Basu, J Gandhi, J Chang, MD Hill, MM Swift ACM SIGARCH Computer Architecture News 41 (3), 237-248, 2013 | 409 | 2013 |
A case for direct-mapped caches MD Hill Computer 21 (12), 25-40, 1988 | 396 | 1988 |
Page placement algorithms for large real-indexed caches RE Kessler, MD Hill ACM Transactions on Computer Systems (TOCS) 10 (4), 338-359, 1992 | 392 | 1992 |
Aspects of cache memory and instruction buffer performance MD Hill University of California, Berkeley, 1987 | 375 | 1987 |
Why on-chip cache coherence is here to stay MMK Martin, MD Hill, DJ Sorin Communications of the ACM 55 (7), 78-89, 2012 | 359 | 2012 |