| Two-dimensional transistors with reconfigurable polarities for secure circuits P Wu, D Reis, XS Hu, J Appenzeller NATURE electronics 4 (1), 45-53, 2021 | 130 | 2021 |
| An ultra-dense 2FeFET TCAM design based on a multi-domain FeFET model X Yin, K Ni, D Reis, S Datta, M Niemier, XS Hu IEEE Transactions on Circuits and Systems II: Express Briefs 66 (9), 1577-1581, 2018 | 126 | 2018 |
| Computing in memory with FeFETs D Reis, M Niemier, XS Hu Proceedings of the international symposium on low power electronics and …, 2018 | 115 | 2018 |
| Design and analysis of an ultra-dense, low-leakage, and fast FeFET-based random access memory array D Reis, K Ni, W Chakraborty, X Yin, M Trentzsch, SD Dünkel, T Melde, ... IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5 …, 2019 | 71 | 2019 |
| A methodology for standard cell design for QCA DA Reis, CAT Campos, TRBS Soares, OPV Neto, FS Torres 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2114-2117, 2016 | 61 | 2016 |
| Computing-in-memory for performance and energy-efficient homomorphic encryption D Reis, J Takeshita, T Jung, M Niemier, XS Hu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (11 …, 2020 | 50 | 2020 |
| Ferroelectric FET based in-memory computing for few-shot learning AF Laguna, X Yin, D Reis, M Niemier, XS Hu Proceedings of the 2019 on Great Lakes Symposium on VLSI, 373-378, 2019 | 45 | 2019 |
| Accelerating deep neural networks in processing-in-memory platforms: Analog or digital approach? S Angizi, Z He, D Reis, XS Hu, W Tsai, SJ Lin, D Fan 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 197-202, 2019 | 44 | 2019 |
| Eva-cim: A system-level performance and energy evaluation framework for computing-in-memory architectures D Gao, D Reis, XS Hu, C Zhuo IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 40* | 2020 |
| A computing-in-memory engine for searching on homomorphically encrypted data D Reis, MT Niemier, XS Hu IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5 …, 2019 | 27 | 2019 |
| The impact of ferroelectric FETs on digital and analog circuits and architectures X Chen, X Sun, P Wang, S Datta, XS Hu, X Yin, M Jerry, S Yu, AF Laguna, ... IEEE Design & Test 37 (1), 79-99, 2019 | 24 | 2019 |
| Modeling and benchmarking computing-in-memory for design space exploration D Reis, D Gao, S Angizi, X Yin, D Fan, M Niemier, C Zhuo, XS Hu Proceedings of the 2020 on Great Lakes Symposium on VLSI, 39-44, 2020 | 19 | 2020 |
| Attention-in-memory for few-shot learning with configurable ferroelectric FET arrays D Reis, AF Laguna, M Niemier, XS Hu Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021 | 15 | 2021 |
| Algorithmic acceleration of b/fv-like somewhat homomorphic encryption for compute-enabled ram J Takeshita, D Reis, T Gong, M Niemier, XS Hu, T Jung Selected Areas in Cryptography: 27th International Conference, Halifax, NS …, 2021 | 15 | 2021 |
| Modeling and design for magnetoelectric ternary content addressable memory (TCAM) S Narla, P Kumar, AF Laguna, D Reis, XS Hu, M Niemier, A Naeemi IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 8 …, 2022 | 11 | 2022 |
| Computing-in-memory using ferroelectrics: From single-to multi-input logic Q Huang, D Reis, C Li, D Gao, M Niemier, XS Hu, M Imani, X Yin, C Zhuo IEEE Design & Test 39 (2), 56-64, 2021 | 11 | 2021 |
| A fast and energy efficient computing-in-memory architecture for few-shot learning applications D Reis, AF Laguna, M Niemier, XS Hu 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 127-132, 2020 | 11 | 2020 |
| Design of a compact spin-orbit-torque-based ternary content addressable memory S Narla, P Kumar, AF Laguna, D Reis, XS Hu, M Niemier, A Naeemi IEEE Transactions on Electron Devices 70 (2), 506-513, 2022 | 10 | 2022 |
| Imars: An in-memory-computing architecture for recommendation systems M Li, AF Laguna, D Reis, X Yin, M Niemier, XS Hu Proceedings of the 59th ACM/IEEE Design Automation Conference, 463-468, 2022 | 9 | 2022 |
| A Defects Simulator for Robustness Analysis of QCA Circuits DA Reis, FS Torres Journal of Integrated Circuits and Systems 11 (2), 86-96, 2016 | 8 | 2016 |
Xiaobo Sharon HuUniversity of Notre Dame, Department of Computer Science and Engineering在 nd.edu 的电子邮件经过验证
